87 lines
2.4 KiB
C
87 lines
2.4 KiB
C
#include "uart.h"
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#include "t124.h"
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#include "util.h"
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#include "clock.h"
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/* UART A, B, C, D and E. */
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static const u16 _uart_base_offsets[5] = { 0, 0x40, 0x200, 0x300, 0x400 };
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void uart_wait_xfer(u32 idx, u32 which)
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{
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uart_t *uart = (uart_t *)(UART_BASE + (u32)_uart_base_offsets[idx]);
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if (UART_TX_IDLE & which)
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{
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while (!(uart->UART_LSR & UART_LSR_TMTY))
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;
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}
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if (UART_RX_RDYR & which)
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{
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while (uart->UART_LSR & UART_LSR_RDR)
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(void)uart->UART_THR_DLAB;
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}
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}
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void uart_send(u32 idx, const u8 *buf, u32 len)
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{
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uart_t *uart = (uart_t *)(UART_BASE + (u32)_uart_base_offsets[idx]);
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for (u32 i = 0; i != len; i++)
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{
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while (!(uart->UART_LSR & UART_LSR_THRE))
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;
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uart->UART_THR_DLAB = buf[i];
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}
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}
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void uart_invert(u32 idx, u32 enable, u32 invert_mask)
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{
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uart_t *uart = (uart_t *)(UART_BASE + (u32)_uart_base_offsets[idx]);
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if (enable)
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uart->UART_IRDA_CSR |= invert_mask;
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else
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uart->UART_IRDA_CSR &= ~invert_mask;
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(void)uart->UART_SPR;
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}
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void uart_init(u32 idx, u32 baud, u32 mode)
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{
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uart_t *uart = (uart_t *)(UART_BASE + (u32)_uart_base_offsets[idx]);
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// Make sure no data is being sent.
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if (!(mode & (UART_MCR_CTS_EN | UART_MCR_DTR)))
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uart_wait_xfer(idx, UART_TX_IDLE);
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// Set clock. bool type
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u32 clk_type = clock_uart_use_src_div(idx, baud);
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// 2 STOP bits for rates > 1M. (Reduced efficiency but less errors on high baudrates).
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u32 uart_lcr_stop = baud > 1000000 ? UART_LCR_STOP : 0;
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// Misc settings.
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u32 div = clk_type ? ((8 * baud + 408000000) / (16 * baud)) : 1; // DIV_ROUND_CLOSEST.
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uart->UART_IER_DLAB = 0; // Disable interrupts.
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uart->UART_LCR = UART_LCR_DLAB | UART_LCR_WORD_LENGTH_8; // Enable DLAB & set 8n1 mode.
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uart->UART_THR_DLAB = (u8)div; // Divisor latch LSB.
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uart->UART_IER_DLAB = (u8)(div >> 8); // Divisor latch MSB.
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// Disable DLAB and set STOP bits setting if applicable.
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uart->UART_LCR = uart_lcr_stop | UART_LCR_WORD_LENGTH_8;
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(void)uart->UART_SPR;
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// Enable fifo.
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uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO;
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(void)uart->UART_SPR;
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sleep(20);
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// Disable hardware flow control.
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uart->UART_MCR = 0;
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sleep(96);
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// Clear tx/rx fifos.
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uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO | UART_IIR_FCR_TX_CLR | UART_IIR_FCR_RX_CLR;
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// Set hardware flow control.
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uart->UART_MCR = mode;
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// Wait 3 symbols for baudrate change.
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sleep(3 * ((baud + 999999) / baud));
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uart_wait_xfer(idx, UART_TX_IDLE | UART_RX_RDYR);
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} |