gardenia

EljakimHerrewijnen/gardenia

Fork 0

Commit Graph

Author	SHA1	Message	Date
hydrogenium2020	ce26824ed9	feat:SDRAM:bring up for 4GB DDR3L H5TC4G63AFR-RDA 792Mhz! Here is the detail: 1. It has 2Ranks and 8bit*8. 2. There are some differences between H5TC4G63AFR-RDA and H5TC4G63AFR-PBA, and the parameters are not universal. If mixed use, it may lead to unstable data in memory writing (for example, data loss during writing).	2024-02-11 14:49:57 +08:00
hydrogenium2020	621ec31ea6	Feat:Try to bring UART(Not Tested) Because my board didn't have any UART port.	2024-01-31 16:41:45 +08:00
hydrogenium2020	a84c7a7f9d	First commit.	2024-01-14 16:20:28 +08:00

Author

SHA1

Message

Date

hydrogenium2020

ce26824ed9

feat:SDRAM:bring up for 4GB DDR3L H5TC4G63AFR-RDA 792Mhz!

Here is the detail:
1. It has 2Ranks and 8bit*8.
2. There are some differences between H5TC4G63AFR-RDA and H5TC4G63AFR-PBA, and the parameters are not universal. If mixed use, it may lead to unstable data in memory writing (for example, data loss during writing).

2024-02-11 14:49:57 +08:00

hydrogenium2020

621ec31ea6

Feat:Try to bring UART(Not Tested)

Because my board didn't have any UART port.

2024-01-31 16:41:45 +08:00

hydrogenium2020

a84c7a7f9d

First commit.

2024-01-14 16:20:28 +08:00

3 Commits