Chuanhong Guo cf50f72069 ath79: ar913x: fix eth pll register ... PLL for eth0 internal clock on ar913x is at 0x18050014 and AR913X_ETH0_PLL_SHIFT is 20 instead of 17 Signed-off-by: Chuanhong Guo <gch981213@gmail.com>		2018-08-13 08:37:19 +02:00
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imagebuilder	imagebuilder: manifest function show stderr	2018-08-06 06:54:42 +02:00
linux	ath79: ar913x: fix eth pll register	2018-08-13 08:37:19 +02:00
sdk	sdk: include arch/arm/ Linux includes along with arch/arm64/ ones	2018-08-03 13:47:29 +02:00
toolchain
Config.in
Makefile