82626cc145
This patch adds support for the MikroTik RouterBOARD 921GS-5HPacD r2 (mANTBox 15s), an outdoor sector antenna with a built-in 802.11ac wireless router. Additionally, it adds a new profile for devices with >= 128 MB NAND flash and 802.11ac to the ar71xx/mikrotik subtarget. See https://mikrotik.com/product/RB921GS-5HPacD-15S for more info. Specifications: - SoC: Qualcomm Atheros QCA9558 (720 MHz) - RAM: 128 MB - Storage: 128 MB NAND - Wireless: external QCA9822 802.11a/ac 2x2:2 - Ethernet: 1x 1000/100/10 Mbps, integrated, via AR8031 PHY, passive PoE in - SFP: 1x host Working: - Board/system detection - NAND storage detection - Wireless - Ethernet - 1x user LED - Reset button - Sysupgrade Untested: - SFP cage (probably not working) Installation: - Boot initramfs image via TFTP and then flash sysupgrade image Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
306 lines
7.2 KiB
C
306 lines
7.2 KiB
C
/*
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* MikroTik RouterBOARD 91X support
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*
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* Copyright (C) 2015 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/phy.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/ath9k_platform.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <linux/routerboot.h>
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#include <linux/gpio.h>
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#include <linux/platform_data/phy-at803x.h>
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#include <linux/version.h>
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#include <asm/prom.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-gpio-buttons.h"
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#include "dev-eth.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-nfc.h"
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#include "dev-usb.h"
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#include "dev-spi.h"
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#include "machtypes.h"
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#include "pci.h"
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#include "routerboot.h"
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#define RB922_GPIO_LED_USR 12
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#define RB922_GPIO_USB_POWER 13
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#define RB922_GPIO_FAN_CTRL 14
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#define RB922_GPIO_BTN_RESET 20
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#define RB922_GPIO_NAND_NCE 23
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#define RB922_PHY_ADDR 4
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#define RB922_KEYS_POLL_INTERVAL 20 /* msecs */
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#define RB922_KEYS_DEBOUNCE_INTERVAL (3 * RB922_KEYS_POLL_INTERVAL)
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#define RB_ROUTERBOOT_OFFSET 0x0000
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#define RB_ROUTERBOOT_MIN_SIZE 0xb000
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#define RB_HARD_CFG_SIZE 0x1000
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#define RB_BIOS_OFFSET 0xd000
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#define RB_BIOS_SIZE 0x1000
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#define RB_SOFT_CFG_OFFSET 0xf000
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#define RB_SOFT_CFG_SIZE 0x1000
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static struct mtd_partition rb922gs_spi_partitions[] = {
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{
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.name = "routerboot",
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.offset = RB_ROUTERBOOT_OFFSET,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "hard_config",
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.size = RB_HARD_CFG_SIZE,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "bios",
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.offset = RB_BIOS_OFFSET,
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.size = RB_BIOS_SIZE,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "soft_config",
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.size = RB_SOFT_CFG_SIZE,
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}
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};
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static struct flash_platform_data rb922gs_spi_flash_data = {
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.parts = rb922gs_spi_partitions,
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.nr_parts = ARRAY_SIZE(rb922gs_spi_partitions),
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};
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static struct gpio_led rb922gs_leds[] __initdata = {
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{
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.name = "rb:green:user",
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.gpio = RB922_GPIO_LED_USR,
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.active_low = 1,
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},
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};
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static struct gpio_keys_button rb922gs_gpio_keys[] __initdata = {
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{
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.desc = "Reset button",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = RB922_KEYS_DEBOUNCE_INTERVAL,
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.gpio = RB922_GPIO_BTN_RESET,
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.active_low = 1,
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},
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};
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static struct at803x_platform_data rb922gs_at803x_data = {
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.disable_smarteee = 1,
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};
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static struct mdio_board_info rb922gs_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = RB922_PHY_ADDR,
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.platform_data = &rb922gs_at803x_data,
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},
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};
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static void __init rb922gs_init_partitions(const struct rb_info *info)
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{
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rb922gs_spi_partitions[0].size = info->hard_cfg_offs;
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rb922gs_spi_partitions[1].offset = info->hard_cfg_offs;
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rb922gs_spi_partitions[3].offset = info->soft_cfg_offs;
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}
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static void rb922gs_nand_select_chip(int chip_no)
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{
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switch (chip_no) {
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case 0:
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gpio_set_value(RB922_GPIO_NAND_NCE, 0);
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break;
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default:
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gpio_set_value(RB922_GPIO_NAND_NCE, 1);
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break;
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}
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ndelay(500);
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}
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#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
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static struct nand_ecclayout rb922gs_nand_ecclayout = {
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.eccbytes = 6,
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.eccpos = { 8, 9, 10, 13, 14, 15 },
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.oobavail = 9,
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.oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
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};
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#else
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static int rb922gs_ooblayout_ecc(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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switch (section) {
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case 0:
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oobregion->offset = 8;
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oobregion->length = 3;
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return 0;
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case 1:
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oobregion->offset = 13;
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oobregion->length = 3;
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return 0;
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default:
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return -ERANGE;
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}
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}
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static int rb922gs_ooblayout_free(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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switch (section) {
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case 0:
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oobregion->offset = 0;
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oobregion->length = 4;
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return 0;
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case 1:
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oobregion->offset = 4;
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oobregion->length = 1;
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return 0;
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case 2:
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oobregion->offset = 6;
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oobregion->length = 2;
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return 0;
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case 3:
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oobregion->offset = 11;
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oobregion->length = 2;
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return 0;
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default:
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return -ERANGE;
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}
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}
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static const struct mtd_ooblayout_ops rb922gs_nand_ecclayout_ops = {
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.ecc = rb922gs_ooblayout_ecc,
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.free = rb922gs_ooblayout_free,
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};
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#endif /* < 4.6 */
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static int rb922gs_nand_scan_fixup(struct mtd_info *mtd)
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{
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#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
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struct nand_chip *chip = mtd->priv;
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#else
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struct nand_chip *chip = mtd_to_nand(mtd);
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#endif /* < 4.6.0 */
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if (mtd->writesize == 512) {
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/*
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* Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot
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* will not be able to find the kernel that we load.
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*/
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#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
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chip->ecc.layout = &rb922gs_nand_ecclayout;
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#else
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mtd_set_ooblayout(mtd, &rb922gs_nand_ecclayout_ops);
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#endif
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}
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chip->options = NAND_NO_SUBPAGE_WRITE;
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return 0;
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}
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static struct mtd_partition rb922gs_nand_partitions[] = {
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{
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.name = "booter",
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.offset = 0,
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.size = (256 * 1024),
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "kernel",
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.offset = (256 * 1024),
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.size = (4 * 1024 * 1024) - (256 * 1024),
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},
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{
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.name = "ubi",
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.offset = MTDPART_OFS_NXTBLK,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static void __init rb922gs_nand_init(void)
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{
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gpio_request_one(RB922_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE");
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ath79_nfc_set_scan_fixup(rb922gs_nand_scan_fixup);
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ath79_nfc_set_parts(rb922gs_nand_partitions,
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ARRAY_SIZE(rb922gs_nand_partitions));
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ath79_nfc_set_select_chip(rb922gs_nand_select_chip);
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ath79_nfc_set_swap_dma(true);
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ath79_register_nfc();
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}
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static void __init rb922gs_setup(void)
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{
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const struct rb_info *info;
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char buf[64];
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info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000);
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if (!info)
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return;
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scnprintf(buf, sizeof(buf), "MikroTik RouterBOARD %s",
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(info->board_name) ? info->board_name : "");
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mips_set_machine_name(buf);
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rb922gs_init_partitions(info);
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ath79_register_m25p80(&rb922gs_spi_flash_data);
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rb922gs_nand_init();
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ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
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ath79_register_mdio(0, 0x0);
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mdiobus_register_board_info(rb922gs_mdio0_info,
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ARRAY_SIZE(rb922gs_mdio0_info));
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ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = BIT(RB922_PHY_ADDR);
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if (strcmp(info->board_name, "921GS-5HPacD r2") == 0) {
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ath79_eth0_pll_data.pll_10 = 0xa0001313;
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ath79_eth0_pll_data.pll_100 = 0xa0000101;
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ath79_eth0_pll_data.pll_1000 = 0x8f000000;
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}
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else {
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ath79_eth0_pll_data.pll_10 = 0x81001313;
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ath79_eth0_pll_data.pll_100 = 0x81000101;
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ath79_eth0_pll_data.pll_1000 = 0x8f000000;
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}
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ath79_register_eth(0);
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ath79_register_pci();
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ath79_register_leds_gpio(-1, ARRAY_SIZE(rb922gs_leds), rb922gs_leds);
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ath79_register_gpio_keys_polled(-1, RB922_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(rb922gs_gpio_keys),
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rb922gs_gpio_keys);
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/* NOTE:
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* This only supports the RB911G-5HPacD board for now. For other boards
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* more devices must be registered based on the hardware options which
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* can be found in the hardware configuration of RouterBOOT.
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*/
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}
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MIPS_MACHINE_NONAME(ATH79_MACH_RB_922GS, "922gs", rb922gs_setup);
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