121 lines
2.8 KiB
C
121 lines
2.8 KiB
C
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/*
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This file contains the sigma-delta driver implementation.
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*/
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#include "platform.h"
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#include "hw_timer.h"
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#include "task/task.h"
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#include <stdlib.h>
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#include "pcm.h"
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static const os_param_t drv_sd_hw_timer_owner = 0x70636D; // "pcm"
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static void ICACHE_RAM_ATTR drv_sd_timer_isr( os_param_t arg )
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{
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cfg_t *cfg = (cfg_t *)arg;
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pcm_buf_t *buf = &(cfg->bufs[cfg->rbuf_idx]);
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if (cfg->isr_throttled) {
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return;
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}
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if (!buf->empty) {
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uint16_t tmp;
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// buffer is not empty, continue reading
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tmp = abs((int16_t)(buf->data[buf->rpos]) - 128);
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if (tmp > cfg->vu_peak_tmp) {
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cfg->vu_peak_tmp = tmp;
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}
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cfg->vu_samples_tmp++;
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if (cfg->vu_samples_tmp >= cfg->vu_req_samples) {
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cfg->vu_peak = cfg->vu_peak_tmp;
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task_post_low( pcm_data_vu_task, (os_param_t)cfg );
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cfg->vu_samples_tmp = 0;
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cfg->vu_peak_tmp = 0;
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}
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platform_sigma_delta_set_target( buf->data[buf->rpos++] );
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if (buf->rpos >= buf->len) {
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// buffer data consumed, request to re-fill it
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buf->empty = TRUE;
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cfg->fbuf_idx = cfg->rbuf_idx;
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task_post_high( pcm_data_play_task, (os_param_t)cfg );
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// switch to next buffer
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cfg->rbuf_idx ^= 1;
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dbg_platform_gpio_write( PLATFORM_GPIO_LOW );
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}
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} else {
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// flag ISR throttled
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cfg->isr_throttled = 1;
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dbg_platform_gpio_write( PLATFORM_GPIO_LOW );
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cfg->fbuf_idx = cfg->rbuf_idx;
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task_post_high( pcm_data_play_task, (os_param_t)cfg );
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}
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}
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static uint8_t drv_sd_stop( cfg_t *cfg )
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{
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platform_hw_timer_close( drv_sd_hw_timer_owner );
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return TRUE;
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}
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static uint8_t drv_sd_close( cfg_t *cfg )
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{
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drv_sd_stop( cfg );
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platform_sigma_delta_close( cfg->pin );
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dbg_platform_gpio_mode( PLATFORM_GPIO_INPUT, PLATFORM_GPIO_PULLUP );
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return TRUE;
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}
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static uint8_t drv_sd_play( cfg_t *cfg )
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{
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// VU control: derive callback frequency
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cfg->vu_req_samples = (uint16_t)((1000000L / (uint32_t)cfg->vu_freq) / (uint32_t)pcm_rate_def[cfg->rate]);
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cfg->vu_samples_tmp = 0;
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cfg->vu_peak_tmp = 0;
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// (re)start hardware timer ISR to feed the sigma-delta
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if (platform_hw_timer_init( drv_sd_hw_timer_owner, FRC1_SOURCE, TRUE )) {
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platform_hw_timer_set_func( drv_sd_hw_timer_owner, drv_sd_timer_isr, (os_param_t)cfg );
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platform_hw_timer_arm_us( drv_sd_hw_timer_owner, pcm_rate_def[cfg->rate] );
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return TRUE;
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} else {
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return FALSE;
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}
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}
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static uint8_t drv_sd_init( cfg_t *cfg )
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{
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dbg_platform_gpio_write( PLATFORM_GPIO_HIGH );
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dbg_platform_gpio_mode( PLATFORM_GPIO_OUTPUT, PLATFORM_GPIO_PULLUP );
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platform_sigma_delta_setup( cfg->pin );
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platform_sigma_delta_set_prescale( 9 );
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return TRUE;
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}
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static uint8_t drv_sd_fail( cfg_t *cfg )
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{
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return FALSE;
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}
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const drv_t pcm_drv_sd = {
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.init = drv_sd_init,
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.close = drv_sd_close,
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.play = drv_sd_play,
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.record = drv_sd_fail,
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.stop = drv_sd_stop
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};
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