661 lines
23 KiB
C
661 lines
23 KiB
C
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/*
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* ESPRESSIF MIT License
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*
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* Copyright (c) 2016 <ESPRESSIF SYSTEMS (SHANGHAI) PTE LTD>
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*
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* Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case,
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* it is free of charge, to any person obtaining a copy of this software and associated
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* documentation files (the "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the Software is furnished
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* to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all copies or
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* substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*
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* Rework of original driver: Natalia Sorokina <sonaux@gmail.com>, 2018
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*/
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#include <stdlib.h>
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#include "ets_sys.h"
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#include "osapi.h"
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#include "gpio.h"
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#include "user_interface.h"
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#include "cpu_esp8266.h"
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#include "pin_map.h"
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#include "user_config.h"
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#include "driver/i2c_master.h"
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#ifndef I2C_MASTER_OLD_VERSION
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/******************************************************************************
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* NEW driver
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* Enabled if I2C_MASTER_OLD_VERSION is not defined in user_config.h
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*******************************************************************************/
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// Supports multiple i2c buses
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// I2C speed in range 25kHz - 550kHz (25kHz - 1MHz if CPU at 160MHz)
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// If GPIO16 is used as SCL then speed is limited to 25kHz - 400kHz
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// Speed is defined for every bus separately
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// enable use GPIO16 (D0) pin as SCL line
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#ifdef I2C_MASTER_GPIO16_ENABLE
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#define IS_PIN16(n) ((n)==16)
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// CPU_CYCLES_BETWEEN_DELAYS describes how much cpu cycles code runs
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// between i2c_master_setDC() calls if delay is zero and i2c_master_set_DC_delay()
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// is not being called. This is not exact value, but proportional with length of code.
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// Increasing the value results in less delay and faster i2c clock speed.
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#define CPU_CYCLES_BETWEEN_DELAYS 80
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// CPU_CYCLES_GPIO16 is added to CPU_CYCLES_BETWEEN_DELAYS,
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// as RTC-related IO takes much more time than standard GPIOs.
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// Increasing the value results in less delay and faster i2c clock speed for GPIO16.
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#define CPU_CYCLES_GPIO16 90
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#else
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// If GPIO16 support is not enabled, remove GPIO16-related code during compile
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// and change timing constants.
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#define IS_PIN16(n) (0)
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#define CPU_CYCLES_BETWEEN_DELAYS 74
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#endif //I2C_MASTER_GPIO16_ENABLE
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#define MIN_SPEED 25000
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#define MAX_NUMBER_OF_I2C NUM_I2C
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typedef struct {
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uint8 last_SDA;
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uint8 last_SCL;
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uint8 pin_SDA;
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uint8 pin_SCL;
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uint32 pin_SDA_SCL_mask;
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uint32 pin_SDA_mask;
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uint32 pin_SCL_mask;
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uint32 speed;
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sint16 cycles_delay;
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} i2c_master_state_t;
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static i2c_master_state_t *i2c[MAX_NUMBER_OF_I2C];
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/******************************************************************************
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* FunctionName : i2c_master_set_DC_delay
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* Description : Internal used function - calculate delay for i2c_master_setDC
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* Parameters : bus id
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* Returns : NONE
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*******************************************************************************/
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LOCAL void ICACHE_FLASH_ATTR
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i2c_master_set_DC_delay(uint16 id)
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{
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// [cpu cycles per half SCL clock period] - [cpu cycles that code takes to run]
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i2c[id]->cycles_delay = system_get_cpu_freq() * 500000 / i2c[id]->speed - CPU_CYCLES_BETWEEN_DELAYS;
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#ifdef I2C_MASTER_GPIO16_ENABLE
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if(IS_PIN16(i2c[id]->pin_SCL)){ //if GPIO16
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i2c[id]->cycles_delay -= CPU_CYCLES_GPIO16; //decrease delay
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}
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#endif //I2C_MASTER_GPIO16_ENABLE
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if(i2c[id]->cycles_delay < 0){
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i2c[id]->cycles_delay = 0;
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}
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}
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/******************************************************************************
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* FunctionName : i2c_master_wait_cpu_cycles
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* Description : Internal used function - wait for given count of cpu cycles
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* Parameters : sint16 cycles_delay
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* Returns : NONE
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*******************************************************************************/
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static inline void i2c_master_wait_cpu_cycles(sint16 cycles_delay)
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{
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uint32 cycles_start;
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uint32 cycles_curr;
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// uses special 'ccount' register which is increased every CPU cycle
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// to make precise delay
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asm volatile("rsr %0, ccount":"=a"(cycles_start));
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do{
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asm volatile("rsr %0, ccount":"=a"(cycles_curr));
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} while (cycles_curr - cycles_start < cycles_delay);
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}
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/******************************************************************************
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* FunctionName : i2c_master_wait_gpio_SCL_high
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* Description : Internal used function - wait until SCL line in a high state
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(slave device may hold SCL line low until it is ready to proceed)
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* Parameters : bus id
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* Returns : NONE
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*******************************************************************************/
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static inline void i2c_master_wait_gpio_SCL_high(uint16 id)
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{
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// retrieves bitmask of all GPIOs from memory-mapped gpio register and exits if SCL bit is set
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// equivalent, but slow variant:
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// while(!(READ_PERI_REG(PERIPHS_GPIO_BASEADDR + GPIO_IN_ADDRESS) & i2c[id]->pin_SCL_mask)) {};
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// even slower: while (!(gpio_input_get() & i2c[id]->pin_SCL_mask)) {};
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asm volatile("l_wait:"
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"l16ui %0, %[gpio_in_addr], 0;" //read gpio state into register %0
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"memw;" //wait for read completion
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"bnall %0, %[gpio_SCL_mask], l_wait;" // test if SCL bit not set
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::[gpio_SCL_mask] "r" (i2c[id]->pin_SCL_mask),
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[gpio_in_addr] "r" (PERIPHS_GPIO_BASEADDR + GPIO_IN_ADDRESS)
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);
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}
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/******************************************************************************
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* FunctionName : i2c_master_setDC
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* Description : Internal used function -
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* set i2c SDA and SCL bit value for half clock cycle
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* Parameters : bus id, uint8 SDA, uint8 SCL
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* Returns : NONE
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*******************************************************************************/
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LOCAL void ICACHE_FLASH_ATTR
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i2c_master_setDC(uint16 id, uint8 SDA, uint8 SCL)
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{
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uint32 this_SDA_SCL_set_mask;
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uint32 this_SDA_SCL_clear_mask;
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i2c[id]->last_SDA = SDA;
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i2c[id]->last_SCL = SCL;
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if(i2c[id]->cycles_delay > 0){
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i2c_master_wait_cpu_cycles(i2c[id]->cycles_delay);
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}
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if (IS_PIN16(i2c[id]->pin_SCL)){ //GPIO16 wired differently, it has it's own register address
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WRITE_PERI_REG(RTC_GPIO_OUT, SCL); // write SCL value
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if(1 == SDA){
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GPIO_REG_WRITE(GPIO_OUT_W1TS_ADDRESS, i2c[id]->pin_SDA_mask); //SDA = 1
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}else{
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GPIO_REG_WRITE(GPIO_OUT_W1TC_ADDRESS, i2c[id]->pin_SDA_mask); // SDA = 0
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}
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if(1 == SCL){ //clock stretching, GPIO16 version
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while(!(READ_PERI_REG(RTC_GPIO_IN_DATA) & 1)) {}; //read SCL value until SCL goes high
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}else{
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// dummy read operation and empty CPU cycles to maintain equal times for low and high state
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(void) (READ_PERI_REG(RTC_GPIO_IN_DATA) & 1); asm volatile("nop;nop;nop;nop;");
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}
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}
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else{
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this_SDA_SCL_set_mask = (SDA << i2c[id]->pin_SDA) | (SCL << i2c[id]->pin_SCL);
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this_SDA_SCL_clear_mask = i2c[id]->pin_SDA_SCL_mask ^ this_SDA_SCL_set_mask;
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GPIO_REG_WRITE(GPIO_OUT_W1TC_ADDRESS, this_SDA_SCL_clear_mask);
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GPIO_REG_WRITE(GPIO_OUT_W1TS_ADDRESS, this_SDA_SCL_set_mask);
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if(1 == SCL) { //clock stretching
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i2c_master_wait_gpio_SCL_high(id);
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}else{
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asm volatile("nop;nop;nop;"); // empty CPU cycles to maintain equal times for low and high state
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}
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}
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}
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/******************************************************************************
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* FunctionName : i2c_master_getDC
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* Description : Internal used function -
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* get i2c SDA bit value
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* Parameters : bus id
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* Returns : uint8 - SDA bit value
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*******************************************************************************/
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static inline uint8 ICACHE_FLASH_ATTR
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i2c_master_getDC(uint16 id)
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{
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return (READ_PERI_REG(PERIPHS_GPIO_BASEADDR + GPIO_IN_ADDRESS) >> i2c[id]->pin_SDA) & 1;
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}
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/******************************************************************************
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* FunctionName : i2c_master_configured
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* Description : checks if i2c bus is configured
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* Parameters : bus id
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* Returns : boolean value, true if configured
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*******************************************************************************/
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bool ICACHE_FLASH_ATTR
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i2c_master_configured(uint16 id){
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return !(NULL == i2c[id]);
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}
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/******************************************************************************
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* FunctionName : i2c_master_init
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* Description : initialize I2C bus to enable i2c operations
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(reset state of all slave devices)
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* Parameters : bus id
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* Returns : NONE
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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i2c_master_init(uint16 id)
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{
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uint8 i;
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i2c_master_setDC(id, 1, 0);
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// when SCL = 0, toggle SDA to clear up
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i2c_master_setDC(id, 0, 0) ;
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i2c_master_setDC(id, 1, 0) ;
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// set data_cnt to max value
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for (i = 0; i < 28; i++) {
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i2c_master_setDC(id, 1, 0);
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i2c_master_setDC(id, 1, 1);
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}
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// reset all
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i2c_master_stop(id);
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return;
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}
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/******************************************************************************
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* FunctionName : i2c_master_setup
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* Description : Initializes and configures the driver on given bus ID
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* Parameters : bus id
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* Returns : configured speed
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*******************************************************************************/
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uint32 ICACHE_FLASH_ATTR
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i2c_master_setup(uint16 id, uint8 sda, uint8 scl, uint32 speed)
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{
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if(NULL == i2c[id]){
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i2c[id] = (i2c_master_state_t*) malloc(sizeof(i2c_master_state_t));
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}
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if(NULL == i2c[id]){ // if malloc failed
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return 0;
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}
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i2c[id]->last_SDA = 1; //default idle state
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i2c[id]->last_SCL = 1;
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i2c[id]->pin_SDA = pin_num[sda];
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i2c[id]->pin_SCL = pin_num[scl];
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i2c[id]->pin_SDA_mask = 1 << i2c[id]->pin_SDA;
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i2c[id]->pin_SCL_mask = 1 << i2c[id]->pin_SCL;
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i2c[id]->pin_SDA_SCL_mask = i2c[id]->pin_SDA_mask | i2c[id]->pin_SCL_mask;
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i2c[id]->speed = speed;
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i2c[id]->cycles_delay = 0;
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if(i2c[id]->speed < MIN_SPEED){
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i2c[id]->speed = MIN_SPEED;
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}
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i2c_master_set_DC_delay(id); // recalibrate clock
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ETS_GPIO_INTR_DISABLE(); //disable gpio interrupts
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if (IS_PIN16(i2c[id]->pin_SCL)){ //if GPIO16
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CLEAR_PERI_REG_MASK(PAD_XPD_DCDC_CONF, 0x43); //disable all functions for XPD_DCDC
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SET_PERI_REG_MASK(PAD_XPD_DCDC_CONF, 0x1); // select function RTC_GPIO0 for pin XPD_DCDC
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CLEAR_PERI_REG_MASK(RTC_GPIO_CONF, 0x1); //mux configuration for out enable
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SET_PERI_REG_MASK(RTC_GPIO_ENABLE, 0x1); //out enable
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SET_PERI_REG_MASK(RTC_GPIO_OUT, 0x1); // set SCL high
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}
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else{
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PIN_FUNC_SELECT(pin_mux[scl], pin_func[scl]);
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SET_PERI_REG_MASK(PERIPHS_GPIO_BASEADDR + GPIO_PIN_ADDR(GPIO_ID_PIN(i2c[id]->pin_SCL)),
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GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE)); //open drain
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gpio_output_set(i2c[id]->pin_SCL_mask, 0, i2c[id]->pin_SCL_mask, 0); //enable and set high
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}
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PIN_FUNC_SELECT(pin_mux[sda], pin_func[sda]);
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SET_PERI_REG_MASK(PERIPHS_GPIO_BASEADDR + GPIO_PIN_ADDR(GPIO_ID_PIN(i2c[id]->pin_SDA)),
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GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE)); //open drain
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gpio_output_set(i2c[id]->pin_SDA_mask, 0, i2c[id]->pin_SDA_mask, 0); //enable and set high
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ETS_GPIO_INTR_ENABLE(); //enable gpio interrupts
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if (! (gpio_input_get() ^ i2c[id]->pin_SCL_mask)){ //SCL is in low state, bus failure
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return 0;
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}
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i2c_master_init(id);
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if (! (gpio_input_get() ^ i2c[id]->pin_SDA_mask)){ //SDA is in low state, bus failure
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return 0;
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}
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return i2c[id]->speed;
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}
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/******************************************************************************
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* FunctionName : i2c_master_start
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* Description : set i2c to send state
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* Parameters : bus id
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* Returns : NONE
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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i2c_master_start(uint16 id)
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{
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i2c_master_set_DC_delay(id); // recalibrate clock
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i2c_master_setDC(id, 1, i2c[id]->last_SCL);
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i2c_master_setDC(id, 1, 1);
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i2c_master_setDC(id, 0, 1);
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}
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/******************************************************************************
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* FunctionName : i2c_master_stop
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* Description : set i2c to stop sending state
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* Parameters : bus id
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* Returns : NONE
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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i2c_master_stop(uint16 id)
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{
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i2c_master_setDC(id, 0, i2c[id]->last_SCL);
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i2c_master_setDC(id, 0, 1);
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i2c_master_setDC(id, 1, 1);
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}
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/******************************************************************************
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* FunctionName : i2c_master_readByte
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* Description : read Byte from i2c bus
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* Parameters : bus id
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* Returns : uint8 - readed value
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*******************************************************************************/
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uint8 ICACHE_FLASH_ATTR
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i2c_master_readByte(uint16 id, sint16 ack)
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{
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uint8 retVal = 0;
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uint8 k;
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sint8 i;
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//invert and clamp ACK to 0/1, because ACK == 1 for i2c means SDA in low state
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uint8 ackLevel = (ack ? 0 : 1);
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i2c_master_setDC(id, i2c[id]->last_SDA, 0);
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i2c_master_setDC(id, 1, 0);
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for (i = 7; i >= 0; i--) {
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i2c_master_setDC(id, 1, 1);
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k = i2c_master_getDC(id);
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i2c_master_setDC(id, 1, 0); // unnecessary in last iteration
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k <<= i;
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retVal |= k;
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}
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// set ACK
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i2c_master_setDC(id, ackLevel, 0);
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i2c_master_setDC(id, ackLevel, 1);
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i2c_master_setDC(id, 1, 0);
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return retVal;
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}
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/******************************************************************************
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* FunctionName : i2c_master_writeByte
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* Description : write wrdata value(one byte) into i2c
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* Parameters : bus id, uint8 wrdata - write value
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* Returns : NONE
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*******************************************************************************/
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uint8 ICACHE_FLASH_ATTR
|
||
|
i2c_master_writeByte(uint16 id, uint8 wrdata)
|
||
|
{
|
||
|
uint8 dat;
|
||
|
sint8 i;
|
||
|
uint8 retVal;
|
||
|
|
||
|
i2c_master_setDC(id, i2c[id]->last_SDA, 0);
|
||
|
for (i = 7; i >= 0; i--) {
|
||
|
dat = (wrdata >> i) & 1;
|
||
|
i2c_master_setDC(id, dat, 0);
|
||
|
i2c_master_setDC(id, dat, 1);
|
||
|
}
|
||
|
//get ACK
|
||
|
i2c_master_setDC(id, 1, 0);
|
||
|
i2c_master_setDC(id, 1, 1);
|
||
|
retVal = i2c_master_getDC(id);
|
||
|
i2c_master_setDC(id, 1, 0);
|
||
|
return ! retVal;
|
||
|
}
|
||
|
|
||
|
|
||
|
|
||
|
#else // if defined I2C_MASTER_OLD_VERSION
|
||
|
/******************************************************************************
|
||
|
* OLD driver
|
||
|
* Enabled when I2C_MASTER_OLD_VERSION is defined in user_config.h
|
||
|
*******************************************************************************/
|
||
|
|
||
|
#define I2C_MASTER_SDA_MUX (pin_mux[sda])
|
||
|
#define I2C_MASTER_SCL_MUX (pin_mux[scl])
|
||
|
#define I2C_MASTER_SDA_GPIO (pinSDA)
|
||
|
#define I2C_MASTER_SCL_GPIO (pinSCL)
|
||
|
#define I2C_MASTER_SDA_FUNC (pin_func[sda])
|
||
|
#define I2C_MASTER_SCL_FUNC (pin_func[scl])
|
||
|
#define I2C_MASTER_SDA_HIGH_SCL_HIGH() \
|
||
|
gpio_output_set(1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0)
|
||
|
#define I2C_MASTER_SDA_HIGH_SCL_LOW() \
|
||
|
gpio_output_set(1<<I2C_MASTER_SDA_GPIO, 1<<I2C_MASTER_SCL_GPIO, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0)
|
||
|
#define I2C_MASTER_SDA_LOW_SCL_HIGH() \
|
||
|
gpio_output_set(1<<I2C_MASTER_SCL_GPIO, 1<<I2C_MASTER_SDA_GPIO, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0)
|
||
|
#define I2C_MASTER_SDA_LOW_SCL_LOW() \
|
||
|
gpio_output_set(0, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0)
|
||
|
#define i2c_master_wait os_delay_us
|
||
|
#define I2C_MASTER_SPEED 100000
|
||
|
#define I2C_MASTER_BUS_ID 0
|
||
|
|
||
|
LOCAL uint8 m_nLastSDA;
|
||
|
LOCAL uint8 m_nLastSCL;
|
||
|
|
||
|
LOCAL uint8 pinSDA = 2;
|
||
|
LOCAL uint8 pinSCL = 15;
|
||
|
|
||
|
/******************************************************************************
|
||
|
* FunctionName : i2c_master_setDC
|
||
|
* Description : Internal used function -
|
||
|
* set i2c SDA and SCL bit value for half clk cycle
|
||
|
* Parameters : uint8 SDA, uint8 SCL
|
||
|
* Returns : NONE
|
||
|
*******************************************************************************/
|
||
|
LOCAL void ICACHE_FLASH_ATTR
|
||
|
i2c_master_setDC(uint8 SDA, uint8 SCL)
|
||
|
{
|
||
|
uint8 sclLevel;
|
||
|
|
||
|
SDA &= 0x01;
|
||
|
SCL &= 0x01;
|
||
|
m_nLastSDA = SDA;
|
||
|
m_nLastSCL = SCL;
|
||
|
|
||
|
if ((0 == SDA) && (0 == SCL)) {
|
||
|
I2C_MASTER_SDA_LOW_SCL_LOW();
|
||
|
} else if ((0 == SDA) && (1 == SCL)) {
|
||
|
I2C_MASTER_SDA_LOW_SCL_HIGH();
|
||
|
} else if ((1 == SDA) && (0 == SCL)) {
|
||
|
I2C_MASTER_SDA_HIGH_SCL_LOW();
|
||
|
} else {
|
||
|
I2C_MASTER_SDA_HIGH_SCL_HIGH();
|
||
|
}
|
||
|
|
||
|
if(1 == SCL) {
|
||
|
do {
|
||
|
sclLevel = GPIO_INPUT_GET(GPIO_ID_PIN(I2C_MASTER_SCL_GPIO));
|
||
|
} while(sclLevel == 0);
|
||
|
}
|
||
|
i2c_master_wait(5);
|
||
|
}
|
||
|
|
||
|
/******************************************************************************
|
||
|
* FunctionName : i2c_master_getDC
|
||
|
* Description : Internal used function -
|
||
|
* get i2c SDA bit value
|
||
|
* Parameters : NONE
|
||
|
* Returns : uint8 - SDA bit value
|
||
|
*******************************************************************************/
|
||
|
LOCAL uint8 ICACHE_FLASH_ATTR
|
||
|
i2c_master_getDC()
|
||
|
{
|
||
|
uint8 sda_out;
|
||
|
sda_out = GPIO_INPUT_GET(GPIO_ID_PIN(I2C_MASTER_SDA_GPIO));
|
||
|
return sda_out;
|
||
|
}
|
||
|
|
||
|
/******************************************************************************
|
||
|
* FunctionName : i2c_master_init
|
||
|
* Description : initilize I2C bus to enable i2c operations
|
||
|
* Parameters : bus id
|
||
|
* Returns : NONE
|
||
|
*******************************************************************************/
|
||
|
void ICACHE_FLASH_ATTR
|
||
|
i2c_master_init(uint16 id)
|
||
|
{
|
||
|
uint8 i;
|
||
|
|
||
|
i2c_master_setDC(1, 0);
|
||
|
|
||
|
// when SCL = 0, toggle SDA to clear up
|
||
|
i2c_master_setDC(0, 0) ;
|
||
|
i2c_master_setDC(1, 0) ;
|
||
|
|
||
|
// set data_cnt to max value
|
||
|
for (i = 0; i < 28; i++) {
|
||
|
i2c_master_setDC(1, 0);
|
||
|
i2c_master_setDC(1, 1);
|
||
|
}
|
||
|
|
||
|
// reset all
|
||
|
i2c_master_stop(I2C_MASTER_BUS_ID);
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
/******************************************************************************
|
||
|
* FunctionName : i2c_master_configured
|
||
|
* Description : checks if i2c bus is configured
|
||
|
* Parameters : bus id
|
||
|
* Returns : boolean value, true if configured
|
||
|
*******************************************************************************/
|
||
|
bool ICACHE_FLASH_ATTR
|
||
|
i2c_master_configured(uint16 id)
|
||
|
{
|
||
|
return true;
|
||
|
}
|
||
|
|
||
|
/******************************************************************************
|
||
|
* FunctionName : i2c_master_setup
|
||
|
* Description : config SDA and SCL gpio to open-drain output mode,
|
||
|
* mux and gpio num defined in i2c_master.h
|
||
|
* Parameters : bus id, uint8 sda, uint8 scl, uint32 speed
|
||
|
* Returns : configured speed
|
||
|
*******************************************************************************/
|
||
|
uint32 ICACHE_FLASH_ATTR
|
||
|
i2c_master_setup(uint16 id, uint8 sda, uint8 scl, uint32 speed)
|
||
|
{
|
||
|
pinSDA = pin_num[sda];
|
||
|
pinSCL = pin_num[scl];
|
||
|
|
||
|
ETS_GPIO_INTR_DISABLE() ;
|
||
|
// ETS_INTR_LOCK();
|
||
|
|
||
|
PIN_FUNC_SELECT(I2C_MASTER_SDA_MUX, I2C_MASTER_SDA_FUNC);
|
||
|
PIN_FUNC_SELECT(I2C_MASTER_SCL_MUX, I2C_MASTER_SCL_FUNC);
|
||
|
|
||
|
GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SDA_GPIO)), GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SDA_GPIO))) | GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE)); //open drain;
|
||
|
GPIO_REG_WRITE(GPIO_ENABLE_ADDRESS, GPIO_REG_READ(GPIO_ENABLE_ADDRESS) | (1 << I2C_MASTER_SDA_GPIO));
|
||
|
GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SCL_GPIO)), GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SCL_GPIO))) | GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE)); //open drain;
|
||
|
GPIO_REG_WRITE(GPIO_ENABLE_ADDRESS, GPIO_REG_READ(GPIO_ENABLE_ADDRESS) | (1 << I2C_MASTER_SCL_GPIO));
|
||
|
|
||
|
I2C_MASTER_SDA_HIGH_SCL_HIGH();
|
||
|
|
||
|
ETS_GPIO_INTR_ENABLE() ;
|
||
|
// ETS_INTR_UNLOCK();
|
||
|
|
||
|
i2c_master_init(I2C_MASTER_BUS_ID);
|
||
|
|
||
|
return I2C_MASTER_SPEED;
|
||
|
}
|
||
|
|
||
|
/******************************************************************************
|
||
|
* FunctionName : i2c_master_start
|
||
|
* Description : set i2c to send state
|
||
|
* Parameters : bus id
|
||
|
* Returns : NONE
|
||
|
*******************************************************************************/
|
||
|
void ICACHE_FLASH_ATTR
|
||
|
i2c_master_start(uint16 id)
|
||
|
{
|
||
|
i2c_master_setDC(1, m_nLastSCL);
|
||
|
i2c_master_setDC(1, 1);
|
||
|
i2c_master_setDC(0, 1);
|
||
|
}
|
||
|
|
||
|
/******************************************************************************
|
||
|
* FunctionName : i2c_master_stop
|
||
|
* Description : set i2c to stop sending state
|
||
|
* Parameters : bus id
|
||
|
* Returns : NONE
|
||
|
*******************************************************************************/
|
||
|
void ICACHE_FLASH_ATTR
|
||
|
i2c_master_stop(uint16 id)
|
||
|
{
|
||
|
i2c_master_wait(5);
|
||
|
|
||
|
i2c_master_setDC(0, m_nLastSCL);
|
||
|
i2c_master_setDC(0, 1);
|
||
|
i2c_master_setDC(1, 1);
|
||
|
}
|
||
|
|
||
|
/******************************************************************************
|
||
|
* FunctionName : i2c_master_readByte
|
||
|
* Description : read Byte from i2c bus
|
||
|
* Parameters : bus id
|
||
|
* Returns : uint8 - readed value
|
||
|
*******************************************************************************/
|
||
|
uint8 ICACHE_FLASH_ATTR
|
||
|
i2c_master_readByte(uint16 id, sint16 ack)
|
||
|
{
|
||
|
uint8 retVal = 0;
|
||
|
uint8 k, i;
|
||
|
uint8 ackLevel = (ack ? 0 : 1);
|
||
|
|
||
|
i2c_master_wait(5);
|
||
|
i2c_master_setDC(m_nLastSDA, 0);
|
||
|
|
||
|
for (i = 0; i < 8; i++) {
|
||
|
i2c_master_wait(5);
|
||
|
i2c_master_setDC(1, 0);
|
||
|
i2c_master_setDC(1, 1);
|
||
|
|
||
|
k = i2c_master_getDC();
|
||
|
i2c_master_wait(5);
|
||
|
|
||
|
if (i == 7) {
|
||
|
i2c_master_wait(3); ////
|
||
|
}
|
||
|
|
||
|
k <<= (7 - i);
|
||
|
retVal |= k;
|
||
|
}
|
||
|
|
||
|
i2c_master_setDC(1, 0);
|
||
|
// set ACK
|
||
|
i2c_master_setDC(m_nLastSDA, 0);
|
||
|
i2c_master_setDC(ackLevel, 0);
|
||
|
i2c_master_setDC(ackLevel, 1);
|
||
|
i2c_master_wait(3);
|
||
|
i2c_master_setDC(ackLevel, 0);
|
||
|
i2c_master_setDC(1, 0);
|
||
|
return retVal;
|
||
|
}
|
||
|
|
||
|
/******************************************************************************
|
||
|
* FunctionName : i2c_master_writeByte
|
||
|
* Description : write wrdata value(one byte) into i2c
|
||
|
* Parameters : bus id, uint8 wrdata - write value
|
||
|
* Returns : NONE
|
||
|
*******************************************************************************/
|
||
|
uint8 ICACHE_FLASH_ATTR
|
||
|
i2c_master_writeByte(uint16 id, uint8 wrdata)
|
||
|
{
|
||
|
uint8 dat;
|
||
|
sint8 i;
|
||
|
uint8 retVal;
|
||
|
|
||
|
i2c_master_wait(5);
|
||
|
|
||
|
i2c_master_setDC(m_nLastSDA, 0);
|
||
|
|
||
|
for (i = 7; i >= 0; i--) {
|
||
|
dat = wrdata >> i;
|
||
|
i2c_master_setDC(dat, 0);
|
||
|
i2c_master_setDC(dat, 1);
|
||
|
|
||
|
if (i == 0) {
|
||
|
i2c_master_wait(3); ////
|
||
|
}
|
||
|
|
||
|
i2c_master_setDC(dat, 0);
|
||
|
}
|
||
|
// get ACK
|
||
|
i2c_master_setDC(m_nLastSDA, 0);
|
||
|
i2c_master_setDC(1, 0);
|
||
|
i2c_master_setDC(1, 1);
|
||
|
retVal = i2c_master_getDC();
|
||
|
i2c_master_wait(5);
|
||
|
i2c_master_setDC(1, 0);
|
||
|
return ! retVal;
|
||
|
}
|
||
|
#endif
|