ce26824ed9
Here is the detail: 1. It has 2Ranks and 8bit*8. 2. There are some differences between H5TC4G63AFR-RDA and H5TC4G63AFR-PBA, and the parameters are not universal. If mixed use, it may lead to unstable data in memory writing (for example, data loss during writing).
68 lines
2.3 KiB
C
68 lines
2.3 KiB
C
/*
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* Copyright (c) 2024 hydrogenium2020-offical
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* Copyright (c) 2018 naehrwert
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _T124_H_
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#define _T124_H_
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#include "types.h"
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//address map for T124
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#define FUSE_BASE 0x7000F800 //8k length
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#define SE_BASE 0x70012000 //8k length
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#define PMC_BASE 0x7000E400 //2k e400-ebff length
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#define CLOCK_BASE 0x60006000
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#define TIMER0_BASE 0x60005000
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#define MC_BASE 0x70019000
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#define SYSCTR0_BASE 0x700F0000
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#define APB_MISC_BASE 0x70000000
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#define PINMUX_AUX_BASE 0x70003000
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#define I2C_BASE 0x7000C000
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#define UART_BASE 0x70006000
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#define EMC_BASE 0x7001B000
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#define SYSREG_BASE 0x6000C000
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#define BPMP_CACHE_BASE 0x50040000
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#define IRAM_BASE 0x40000000
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#define DRAM_START 0x80000000
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#define MMIO_REG32(base, off) *(vu32 *)((base) + (off))
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#define SE(off) MMIO_REG32(SE_BASE, off)
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#define PMC(off) MMIO_REG32(PMC_BASE, off)
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#define FUSE(off) MMIO_REG32(FUSE_BASE, off)
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#define CLOCK(off) MMIO_REG32(CLOCK_BASE, off)
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#define TIMER0(off) MMIO_REG32(TIMER0_BASE, off)
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#define MC(off) MMIO_REG32(MC_BASE, off)
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#define SYSCTR0(off) MMIO_REG32(SYSCTR0_BASE, off)
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#define APB_MISC(off) MMIO_REG32(APB_MISC_BASE, off)
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#define PINMUX_AUX(off) MMIO_REG32(PINMUX_AUX_BASE, off)
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#define I2C(off) MMIO_REG32(I2C_BASE, off)
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#define UART(off) MMIO_REG32(UART_BASE, off)
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#define EMC(off) MMIO_REG32(EMC_BASE, off)
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#define SYSREG(off) MMIO_REG32(SYSREG_BASE, off)
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#define BPMP_CACHE_CTRL(off) MMIO_REG32(BPMP_CACHE_BASE, off)
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//PMC
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#define APBDEV_PMC_CRYPTO_OP 0xF4
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#define SYSCTR0_CNTFID0 0x20
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//System registers
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//#define AHB_ARBITRATION_XBAR_CTRL 0xE0
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//GPIO
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#define APB_MISC_PP_PINMUX_GLOBAL 0x40
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#endif |