466 lines
16 KiB
Python
466 lines
16 KiB
Python
from ghidra_assistant.utils.utils import *
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from ghidra_assistant.utils.archs.asm_utils import *
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from ghidra_assistant.concrete_device import *
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from qiling.const import QL_ARCH
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from ghidra_assistant.utils.debugger.debugger_archs.ga_arm_thumb import GA_arm_thumb_debugger
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from exploit import *
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from keystone import *
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from t210 import *
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ks_arm = Ks(KS_ARCH_ARM, KS_MODE_ARM)
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ks_thumb = Ks(KS_ARCH_ARM, KS_MODE_THUMB)
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logger = setup_logger("") # get root logger
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logger.setLevel(logging.DEBUG)
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def boot_bct():
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rcm = TegraRCM()
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rcm.dev.read_chip_id()
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file = "/home/eljakim/Source/tegrax1_plus/source/Shofel2_T124_python/ShofEL2-for-T124/boot_bct.bin"
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rcm.send_payload(file, thumb=1)
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def boot_gardenia():
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rcm = TegraRCM()
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rcm.dev.read_chip_id()
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file = "/tmp/gardenia/build/bootloader"
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rcm.send_payload(file, thumb=1)
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r = rcm.dev.read(0x10000)
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try:
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r2 =rcm.dev.read(0x10000)
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except:
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time.sleep(1)
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pass
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def device_setup(concrete_device : "ConcreteDevice"):
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'''
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This function has to return a device object that handles the communication between the host and the device.
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Must implement at least the following:
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* read
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* write
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In this function you can also setup known values that the concrete debugger will use, like the target architecture and locations of the debugger and the vbar
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'''
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#Setup architecture
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concrete_device.arch = QL_ARCH.ARM
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concrete_device.ga_debugger_location = 0x4000E000
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concrete_device.ga_vbar_location = 0x40011000
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concrete_device.ga_storage_location = 0x40013000
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concrete_device.ga_stack_location = 0x40014000
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rcm = TegraRCM()
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rcm.dev.read_chip_id()
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file = "/home/eljakim/Source/ghidra_assistent/source/utils/debugger/remote_shellcode/bin/nvidia_shield_t/debugger.bin"
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file = "/home/eljakim/Source/gupje/source/bin/nvidia_shield/debugger.bin"
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file = "/home/eljakim/Source/gupje/source/bin/nvidia_shield_t/debugger.bin"
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# file = "/tmp/gardenia/build/bootloader"
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rcm.send_payload(file, thumb=1)
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concrete_device.arch_dbg = GA_arm_thumb_debugger(concrete_device.ga_vbar_location, concrete_device.ga_debugger_location, concrete_device.ga_storage_location)
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assert(rcm.dev.read(0x100) == b"GiAs")
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concrete_device.arch_dbg.read = rcm.dev.read
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concrete_device.arch_dbg.write = rcm.dev.write
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#Overwrite all calls to make the concrete target function properly
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concrete_device.copy_functions()
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# And add custom functions
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def read_u32(address):
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return u32(concrete_device.memdump_region(address, 4))
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def write_u32(address, value):
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concrete_device.memwrite_region(address, p32(value))
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def read_str(address):
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d = b""
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while True:
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c = concrete_device.memdump_region(address, 1)
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if c == b"\x00":
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break
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d += c
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address += 1
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return d
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concrete_device.read_u32 = read_u32
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concrete_device.write_u32 = write_u32
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concrete_device.read_str = read_str
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concrete_device.debugger_main = concrete_device.get_debugger_location()
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return rcm
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def test_arm_asm(cd : "ConcreteDevice"):
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cd.arch_dbg.state.auto_sync = False
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shellcode = f"""
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.align 1
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start:
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ldr r0, =addr_some_addr
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ldr r1, =0x1000
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ldr r2, =addr_debugger_storage
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ldr r4, =addr_usb_write
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bx r4
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bx lr
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ldr r0, =addr_debugger_main
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bx r0
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b flush
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ldr r0, =addr_debugger_storage
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ldr r1, =0x77
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ldr r2, =0x77
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str r0, [r0]
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str r1, [r0, #4]
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str r2, [r0, #8]
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bx lr
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flush:
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@ Flush the instruction cache
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@ mov r0, #0 @ Select the instruction cache
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@ mcr p15, 0, r0, c7, c5 @ Invalidate the entire instruction cache
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@ Flush the data cache
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@ mov r0, #0 @ Select the data cache
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@ mcr p15, 0, r0, c7, c6 @ Invalidate the entire data cache
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bx lr
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ldr r0, =addr_debugger_main
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bx r0
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.align 3
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addr_debugger_storage: .word 0x40013000
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addr_usb_write: .word 0x001065C0
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addr_rom_start: .word 0x00100000
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addr_debugger_main : .word 0x4000E000
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addr_some_addr: .word 0x40020000
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.align 1
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addr_debugger_main_t: .word 0x4000E001
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"""
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asm = ks_arm.asm(shellcode, as_bytes=True)[0]
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cd.memwrite_region(0x40013000 + 0x2000, asm)
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cd.jump_to(0x40013000 + 0x2000) #branch arm
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try:
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r = cd.read(0x200)
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pass
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except Exception as e:
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print(str(e))
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pass
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pass
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def dump_full_dram_context(cd : "ConcreteDevice"):
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# BootROM
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rom = cd.memdump_region(0x100000, 0x17000)
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imem = cd.memdump_region(0x40000000, 0xfc00)
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SETUP_SDRAM = 0x00101a14
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def attempt_boot_bct(cd : "ConcreteDevice"):
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dat = open("imem_good.bin", 'rb').read()
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cd.memwrite_region(0x40000000, dat[:0xe000])
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cd.write(b"MAIN")
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cd.arch_dbg.state.auto_sync = False
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cd.arch_dbg.state.print_ctx(print)
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dump_full_dram_context(cd)
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jump_stub = f"""
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.align 1
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ldr r0, addr_debugger_main_t
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bx r0
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.align 4
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addr_debugger_main_t: .word 0x4000E001
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"""
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jump_stub = ks_thumb.asm(jump_stub, as_bytes=True)[0]
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cd.memwrite_region(SETUP_SDRAM, jump_stub)
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# Test dumb restore_and_jump
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# cd.arch_dbg.state.R0 = 0x00101c18
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# cd.arch_dbg.state.R3 = 0x4000E001
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def test_restore_and_jump():
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cd.arch_dbg.state.LR = 0x4000E001
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cd.restore_stack_and_jump(0x00101c28 + 1) # Some dumb function that sets r0
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assert cd.read(100) == b"GiAs"
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cd.arch_dbg.state.LR = 0x4000E001
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cd.arch_dbg.state.R0 = 0x00101c18
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cd.restore_stack_and_jump(SETUP_SDRAM + 1)
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cd.jump_to(0x00101c28 + 1)
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pass
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CLK_RST_CONTROLLER_MISC_CLK_ENB = 0x48
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IROM_LEN = 0x00010000
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def hw_init(cd : "ConcreteDevice"):
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# Get chip id
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# 0x14017
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cd.arch_dbg.state.print_ctx(print)
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def NvBootUtilGetTimeUS():
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cd.arch_dbg.state.LR = cd.arch_dbg.debugger_addr | 1
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cd.arch_dbg.restore_stack_and_jump(0x00100c7e | 1)
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assert cd.read(4) == b'GiAs', "Debugger crashed?"
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return cd.arch_dbg.state.R0
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chip_id = u32(cd.memdump_region(mmio_reg32(BASE_ADDRESSES['APB_MISC_BASE'], APB_MISC_GP_HIDREV), 4))
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chip_version = (chip_id >> 4) & 0xF
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def clock_enable_fuse():
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addr = mmio_reg32(BASE_ADDRESSES['CLOCK_BASE'], CLK_RST_CONTROLLER_MISC_CLK_ENB)
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val = cd.read_u32(addr)
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enable = 1
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cd.write_u32(addr, val & 0xEFFFFFFF | ((enable & 1) << 28))
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# clock_enable_fuse()
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# Clear tz ram,
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# cd.memwrite_region(BASE_ADDRESSES['TZRAM_BASE'], b"\x00" * BASE_ADDRESSES['TZRAM_SIZE'])
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# TODO
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# clock_enable_se
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# clock_enable_fuse
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# fuse_disable_program
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# mc_enable
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# _config_oscillators
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# _config_gpios
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# init_sdram
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def setup_sdram():
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nvbootcontext = 0x40002404
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cd.arch_dbg.state.R0 = nvbootcontext
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cd.arch_dbg.state.LR = cd.ga_debugger_location | 1
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cd.restore_stack_and_jump(0x00101a14 | 1)
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pass
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# setup_sdram()
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def relocate_debugger():
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'''
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Works, relocates the debugger to the end of IRAM
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'''
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reloc = open('/home/eljakim/Source/gupje/source/bin/nvidia_shield_t/debugger_reloc.bin', 'rb').read()
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cd.memwrite_region(0x4003c000, reloc)
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cd.restore_stack_and_jump(0x4003c000 | 1)
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assert cd.read(0x100) == b"GiAs"
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# And relocate the debugger
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cd.relocate_debugger(0x40011000, 0x4003c000, 0x4003e000)
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relocate_debugger()
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cd.memdump_region(0x40020000, 0x100)
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# setup_sdram()
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def nvbootmain():
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# cd.arch_dbg.state.R1 = 0x40000000
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cd.arch_dbg.state.LR = cd.ga_debugger_location | 1
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cd.restore_stack_and_jump(0x00101318 | 1)
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pass
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# nvbootmain()
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NVCOLDBOOT = 0x00101ad2
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def nvbootcoldboot():
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'''
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Works, attempts to load the BCT from the EMMC
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'''
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nvbootinfo = 0x40000000
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cd.write_u32(nvbootinfo, 0x400001)
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cd.write_u32(nvbootinfo + 4, 0x400001)
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cd.write_u32(nvbootinfo + 8, 0x400001)
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# cd.write_u32(nvbootinfo + 0xc, 0x00000001) # Boot type, set later also
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cd.write_u32(nvbootinfo + 0x10, 5) #Irom
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# cd.write_u32(nvbootinfo + 0x10, 9)
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def NvBootClocksGetOscFreq():
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return cd.read_u32(cd.read_u32(0x00100214) + 0x10) >> 0x1c
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cd.write_u32(nvbootinfo + 0x28, NvBootClocksGetOscFreq()) #Irom
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cd.write_u32(nvbootinfo + 0xf0, nvbootinfo + 256) # End of boot info
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# Move debugger in r0, to jump to that on failure
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cd.arch_dbg.state.R0 = 0x40020000 # cd.ga_debugger_location | 1
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cd.arch_dbg.state.LR = cd.ga_debugger_location | 1
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cd.restore_stack_and_jump(NVCOLDBOOT | 1)
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assert cd.read(4) == b"GiAs", "Failed to jump to debugger"
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# BCT should be loaded at 0x40020000
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# nvbootcoldboot()
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boot_to = 0x0
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if cd.arch_dbg.state.R0 == 0:
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# 0x40020000 should point to 0x4000e000
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boot_to = cd.read_u32(0x40020000)
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assert boot_to == 0x4000e000, "BCT not loaded correctly?"
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else:
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# BCT not loaded, fix this
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boot_to = 0x4000e000
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imem = open("/tmp/imem3_bct", 'rb').read()
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cd.memwrite_region(0x40000000, imem)
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# Setup sdram?
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# cd.arch_dbg.state.R0 = 0x40002404
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# cd.arch_dbg.state.LR = cd.ga_debugger_location | 1
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# cd.restore_stack_and_jump(0x00101a14 | 1)
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# pass
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# NvBootSdramQueryTotalSize
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# cd.arch_dbg.state.LR = cd.ga_debugger_location | 1
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# cd.restore_stack_and_jump(0x00105dcc | 1)
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# pass
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#nvloadbootloader
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# cd.arch_dbg.state.R0 = 0x40002404
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# cd.arch_dbg.state.LR = cd.ga_debugger_location | 1
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# cd.restore_stack_and_jump(0x00104822 | 1)
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# pass
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# Apply patches
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# patch validation of secure os
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stub = f"""
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mov r0, 0x0
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bx lr
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"""
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cd.memwrite_region(0x4001a2c0, ks_thumb.asm(stub, as_bytes=True)[0])
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jump_stub = f"""
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ldr r12, addr_debugger_main_t
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bx r12
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.align 4
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addr_debugger_main_t: .word {hex(cd.ga_debugger_location | 1)}
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"""
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jump_stub = ks_arm.asm(jump_stub, as_bytes=True)[0]
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# Setup code for log hook
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cd.memwrite_region(0x4001cadc, jump_stub)
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cd.arch_dbg.state.LR = cd.ga_debugger_location | 1
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cd.restore_stack_and_jump(boot_to)
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while True:
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try:
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r = cd.read(0x100)
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if cd.arch_dbg.state.R0 == 0x77:
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# In nvtloadbinary
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dat = open("/tmp/bootloader.bin", 'rb').read()
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cd.memwrite_region(0x83d88000, dat[:0x90000])
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cd.arch_dbg.state.R0 = 0
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cd.restore_stack_and_jump(cd.arch_dbg.state.LR)
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continue
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elif cd.arch_dbg.state.R0 == 0x76:
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cd.arch_dbg.state.R0 = 0
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cd.restore_stack_and_jump(0x4000e188)
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continue
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else:
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# In log
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msg = cd.read_str(cd.arch_dbg.state.R0)
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# Parse arguments, TODO
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args = msg.count(b"%")
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if b"Bootloader downloaded" in msg:
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# Lets try dump the correct bootloader
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pass
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elif b"corrupted" in msg or b"GPT failed" in msg:
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# Restore bootloader
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print(msg)
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dat = open("/tmp/bootloader.bin", 'rb').read()
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cd.memwrite_region(0x83d88000, dat[:0x90000])
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cd.memwrite_region(0x83d90260, ks_thumb.asm("mov r0, r0", as_bytes=True)[0] * 2)
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# cd.memwrite_region(0x83e130e6, b"\x00") # Fastboot unlock?
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# Remove fastboot lock
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shellcode = f"""
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mov r0, 0x1
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bx lr
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"""
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cd.memwrite_region(0x83dd0eb0, ks_arm.asm(shellcode, as_bytes=True)[0])
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# Jump to bootloader loaded
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cd.arch_dbg.state.R0 = 0
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cd.arch_dbg.state.LR = 0x40018ea0
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cd.restore_stack_and_jump(cd.arch_dbg.state.LR)
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continue
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elif b"WB0" in msg:
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cd.arch_dbg.state.print_ctx(print)
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cd.arch_dbg.state.LR = cd.ga_debugger_location | 1
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cd.restore_stack_and_jump(0x4000e188)
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continue
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elif b"Sdram initialization" in msg:
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pass
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print(f"{hex(cd.arch_dbg.state.LR)}:{msg}")
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cd.restore_stack_and_jump(cd.arch_dbg.state.LR)
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except Exception as e:
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pass
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# Jump in bootloader
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cd.arch_dbg.state.LR = cd.ga_debugger_location | 1
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cd.restore_stack_and_jump(boot_to) # ARM code
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pass
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# Continue next of init fase
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cd.arch_dbg.state.print_ctx(print)
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cd.arch_dbg.state.R0 = 0 # Set as success
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cd.arch_dbg.state.LR = cd.ga_debugger_location | 1
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cd.restore_stack_and_jump(0x00101b76 | 1)
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pass
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def NvBootMainSecureRomExit():
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cd.arch_dbg.state.R0 = 0 #warmboot
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cd.arch_dbg.state.R1 = boot_to
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cd.arch_dbg.state.R2 = 0x0 # Security bitfield
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cd.arch_dbg.state.R3 = 0x0 # debug bitfield
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cd.arch_dbg.state.LR = cd.ga_debugger_location | 1
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cd.restore_stack_and_jump(0x0010121e | 1)
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NvBootMainSecureRomExit()
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def NvBootArcDisable():
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cd.arch_dbg.state.R0 = boot_to
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cd.arch_dbg.state.LR = cd.ga_debugger_location | 1
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cd.restore_stack_and_jump(0x0010166e | 1)
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cd.read(4)
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NvBootArcDisable()
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# def NvBootMainAsmSecureExit():
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# cd.arch_dbg.state.R0 = boot_to
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# cd.arch_dbg.state.R1 = cd.read_u32(0x001015d0)
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# cd.arch_dbg.state.R2 = cd.read_u32(0x001015f0)
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# cd.arch_dbg.state.R3 = 0
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# cd.arch_dbg.state.LR = cd.ga_debugger_location | 1
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# cd.restore_stack_and_jump(0x00100d80 | 1)
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# NvBootMainAsmSecureExit()
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pass
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# cd.memwrite_region(BASE_ADDRESSES['IROM_BASE'], b"\x00" * 0xc000)#)open("imem_good.bin", 'rb').read()[:IROM_LEN]
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def resetfullchip():
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cd.R0 = BASE_ADDRESSES['IROM_BASE']
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cd.R1 = BASE_ADDRESSES['IROM_BASE']
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cd.R2 = BASE_ADDRESSES['IROM_BASE']
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# cd.restore_stack_and_jump(0x00100624 | 1)
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cd.restore_stack_and_jump(0x0010122c | 1)
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pass
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# coldboot()
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pass
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def device_main(cd : "ConcreteDevice", args):
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'''
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Main function that will do execution for the device.
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'''
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cd.test_connection()
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hw_init(cd)
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attempt_boot_bct(cd)
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test_arm_asm(cd)
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pass
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if __name__ == "__main__":
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logger = setup_logger("DEBUGGER")
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logger.setLevel(logging.INFO)
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cd = ConcreteDevice(None, False)
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cd.dev = device_setup(cd)
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cd.device_main = device_main
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cd.device_main(cd, []) |