# Define constants for the base addresses
BASE_ADDRESSES = {
    'IROM_BASE': 0x100000,
    'IRAM_BASE': 0x40000000,
    'HOST1X_BASE': 0x50000000,
    'BPMP_CACHE_BASE': 0x50040000,
    'MSELECT_BASE': 0x50060000,
    'DPAUX1_BASE': 0x54040000,
    'TSEC2_BASE': 0x54100000,
    'DISPLAY_A_BASE': 0x54200000,
    'DISPLAY_B_BASE': 0x54240000,
    'DSI_BASE': 0x54300000,
    'VIC_BASE': 0x54340000,
    'NVJPG_BASE': 0x54380000,
    'NVDEC_BASE': 0x54480000,
    'NVENC_BASE': 0x544C0000,
    'TSEC_BASE': 0x54500000,
    'SOR1_BASE': 0x54580000,
    'GPU_BASE': 0x57000000,
    'GPU_USER_BASE': 0x58000000,
    'RES_SEMAPH_BASE': 0x60001000,
    'ARB_SEMAPH_BASE': 0x60002000,
    'ARBPRI_BASE': 0x60003000,
    'ICTLR_BASE': 0x60004000,
    'TMR_BASE': 0x60005000,
    'CLOCK_BASE': 0x60006000,
    'FLOW_CTLR_BASE': 0x60007000,
    'AHBDMA_BASE': 0x60008000,
    'SYSREG_BASE': 0x6000C000,
    'SB_BASE': 0x6000C000 + 0x200,
    'ACTMON_BASE': 0x6000C800,
    'GPIO_BASE': 0x6000D000,
    'EXCP_VEC_BASE': 0x6000F000,
    'IPATCH_BASE': 0x6001DC00,
    'APBDMA_BASE': 0x60020000,
    'VGPIO_BASE': 0x60024000,
    'APB_MISC_BASE': 0x70000000,
    'PINMUX_AUX_BASE': 0x70003000,
    'UART_BASE': 0x70006000,
    'PWM_BASE': 0x7000A000,
    'I2C_BASE': 0x7000C000,
    'RTC_BASE': 0x7000E000,
    'PMC_BASE': 0x7000E400,
    'FUSE_BASE': 0x7000F800,
    'KFUSE_BASE': 0x7000FC00,
    'SE_BASE': 0x70012000,
    'TSENSOR_BASE': 0x70014000,
    'ATOMICS_BASE': 0x70016000,
    'MC_BASE': 0x70019000,
    'EMC_BASE': 0x7001B000,
    'EMC0_BASE': 0x7001E000,
    'EMC1_BASE': 0x7001F000,
    'XUSB_HOST_BASE': 0x70090000,
    'XUSB_PADCTL_BASE': 0x7009F000,
    'XUSB_DEV_BASE': 0x700D0000,
    'SDMMC_BASE': 0x700B0000,
    'SOC_THERM_BASE': 0x700E2000,
    'MIPI_CAL_BASE': 0x700E3000,
    'SYSCTR0_BASE': 0x700F0000,
    'SYSCTR1_BASE': 0x70100000,
    'CL_DVFS_BASE': 0x70110000,
    'APE_BASE': 0x702C0000,
    'AHUB_BASE': 0x702D0000,
    'AXBAR_BASE': 0x702D0800,
    'I2S_BASE': 0x702D1000,
    'ADMA_BASE': 0x702E2000,
    'SE2_BASE': 0x70412000,
    'SE_PKA1_BASE': 0x70420000,
    'TZRAM_BASE': 0x7C010000,
    'TZRAM_SIZE': 0x10000,
    'TZRAM_T210B01_SIZE': 0x3C000,
    'USB_BASE': 0x7D000000,
    'USB_OTG_BASE': 0x7D000000,
    'USB1_BASE': 0x7D004000,
    'EMEM_BASE': 0x80000000,
}

APB_MISC_GP_HIDREV = 0x804


# Function to get MMIO register
def mmio_reg32(base, offset):
    return base + offset

# Example usage
# HOST1X = lambda offset: mmio_reg32(BASE_ADDRESSES['HOST1X_BASE'], offset)
# BPMP_CACHE_CTRL = lambda offset: mmio_reg32(BASE_ADDRESSES['BPMP_CACHE_BASE'], offset)
# MSELECT = lambda offset: mmio_reg32(BASE_ADDRESSES['MSELECT_BASE'], offset)
# DPAUX1 = lambda offset: mmio_reg32(BASE_ADDRESSES['DPAUX1_BASE'], offset)
# TSEC2 = lambda offset: mmio_reg32(BASE_ADDRESSES['TSEC2_BASE'], offset)

# # Example access
# print(hex(HOST1X(0x100)))  # Example usage of the HOST1X register