71 lines
1.9 KiB
Python
71 lines
1.9 KiB
Python
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#!/usr/bin/env python3
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#
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# Cross Platform and Multi Architecture Advanced Binary Emulation Framework
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#
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from functools import cached_property
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from unicorn import Uc, UC_ARCH_MIPS, UC_MODE_MIPS32, UC_MODE_BIG_ENDIAN, UC_MODE_LITTLE_ENDIAN
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from capstone import Cs, CS_ARCH_MIPS, CS_MODE_MIPS32, CS_MODE_BIG_ENDIAN, CS_MODE_LITTLE_ENDIAN
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from keystone import Ks, KS_ARCH_MIPS, KS_MODE_MIPS32, KS_MODE_BIG_ENDIAN, KS_MODE_LITTLE_ENDIAN
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from qiling import Qiling
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from qiling.arch.arch import QlArch
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from qiling.arch import mips_const
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from qiling.arch.register import QlRegisterManager
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from qiling.const import QL_ARCH, QL_ENDIAN
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class QlArchMIPS(QlArch):
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type = QL_ARCH.MIPS
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bits = 32
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def __init__(self, ql: Qiling, endian: QL_ENDIAN):
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super().__init__(ql)
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self._init_endian = endian
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@cached_property
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def uc(self) -> Uc:
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endian = {
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QL_ENDIAN.EB: UC_MODE_BIG_ENDIAN,
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QL_ENDIAN.EL: UC_MODE_LITTLE_ENDIAN
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}[self.endian]
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return Uc(UC_ARCH_MIPS, UC_MODE_MIPS32 + endian)
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@cached_property
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def regs(self) -> QlRegisterManager:
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regs_map = dict(
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**mips_const.reg_map,
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**mips_const.reg_map_afpr128,
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**mips_const.reg_map_fpu
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)
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pc_reg = 'pc'
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sp_reg = 'sp'
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return QlRegisterManager(self.uc, regs_map, pc_reg, sp_reg)
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@cached_property
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def disassembler(self) -> Cs:
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endian = {
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QL_ENDIAN.EL: CS_MODE_LITTLE_ENDIAN,
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QL_ENDIAN.EB: CS_MODE_BIG_ENDIAN
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}[self.endian]
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return Cs(CS_ARCH_MIPS, CS_MODE_MIPS32 + endian)
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@cached_property
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def assembler(self) -> Ks:
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endian = {
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QL_ENDIAN.EL: KS_MODE_LITTLE_ENDIAN,
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QL_ENDIAN.EB: KS_MODE_BIG_ENDIAN
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}[self.endian]
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return Ks(KS_ARCH_MIPS, KS_MODE_MIPS32 + endian)
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@property
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def endian(self) -> QL_ENDIAN:
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return self._init_endian
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