349e2b7e65
* ! Behavior change ! Old behavior: If the Reset button is held down during power-on do factory reset and try booting recovery from TFTP forever. If valid recovery is received via TFTP, write it to flash and boot. New behavior: If the Reset button is held down during power-on do factory reset, then try TFTP *once*, then try booting on-flash recovery, then keep trying via TFTP forever until a valid image is received. Only if there is no bootable recovery stored on flash, store the downloaded recovery. Then boot it. * Set loadaddr to 0x48000000 in order to allow booting images larger than ~47MB (reported by Oskari Lemmelä). Setting loadaddr to 0x48000000 gives us 384MB on devices with 512MB RAM, which should be more than enough as a maximum size for uImage.FIT to be loaded. * Widely unify device-specific default environment in preparation to auto-generate it from parameters. * backport upstream commit fixing MBR/DOS partitioning Signed-off-by: Daniel Golle <daniel@makrotopia.org>
407 lines
12 KiB
Diff
407 lines
12 KiB
Diff
--- /dev/null
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+++ b/configs/mt7622_linksys_e8450_defconfig
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@@ -0,0 +1,135 @@
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+CONFIG_ARM=y
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+CONFIG_POSITION_INDEPENDENT=y
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+CONFIG_ARCH_MEDIATEK=y
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+CONFIG_TARGET_MT7622=y
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+CONFIG_SYS_TEXT_BASE=0x41e00000
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+CONFIG_SYS_MALLOC_F_LEN=0x4000
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+CONFIG_USE_DEFAULT_ENV_FILE=y
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+CONFIG_BOARD_LATE_INIT=y
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+CONFIG_BOOTP_SEND_HOSTNAME=y
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+CONFIG_DEFAULT_ENV_FILE="linksys_e8450_env"
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+CONFIG_NR_DRAM_BANKS=1
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+CONFIG_DEBUG_UART_BASE=0x11002000
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+CONFIG_DEBUG_UART_CLOCK=25000000
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+CONFIG_DEFAULT_DEVICE_TREE="mt7622-linksys-e8450-ubi"
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+CONFIG_DEBUG_UART=y
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+CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-nand0:512k(bl2),1280k(fip),1024k(factory),256k(reserved),-(ubi)"
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+CONFIG_SMBIOS_PRODUCT_NAME=""
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+CONFIG_AUTOBOOT_KEYED=y
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+CONFIG_BOOTDELAY=30
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+CONFIG_AUTOBOOT_MENU_SHOW=y
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+CONFIG_CFB_CONSOLE_ANSI=y
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+CONFIG_BUTTON=y
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+CONFIG_BUTTON_GPIO=y
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+CONFIG_GPIO_HOG=y
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+CONFIG_CMD_ENV_FLAGS=y
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+CONFIG_FIT=y
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+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
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+CONFIG_LED=y
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+CONFIG_LED_BLINK=y
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+CONFIG_LED_GPIO=y
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+CONFIG_LOGLEVEL=7
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+CONFIG_LOG=y
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+CONFIG_DEFAULT_FDT_FILE="mt7622-linksys-e8450"
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+CONFIG_SYS_PROMPT="MT7622> "
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+CONFIG_CMD_BOOTMENU=y
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+CONFIG_CMD_BOOTP=y
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+CONFIG_CMD_BUTTON=y
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+CONFIG_CMD_CDP=y
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+CONFIG_CMD_DHCP=y
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+CONFIG_CMD_DNS=y
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+CONFIG_CMD_ECHO=y
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+CONFIG_CMD_ENV_READMEM=y
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+CONFIG_CMD_ERASEENV=y
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+CONFIG_CMD_EXT4=y
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+CONFIG_CMD_FAT=y
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+CONFIG_CMD_FS_GENERIC=y
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+CONFIG_CMD_FS_UUID=y
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+CONFIG_CMD_GPIO=y
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+CONFIG_CMD_GPT=y
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+CONFIG_CMD_HASH=y
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+CONFIG_CMD_ITEST=y
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+CONFIG_CMD_LED=y
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+CONFIG_CMD_LICENSE=y
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+CONFIG_CMD_LINK_LOCAL=y
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+# CONFIG_CMD_MBR is not set
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+CONFIG_CMD_MTD=y
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+CONFIG_CMD_MTDPART=y
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+CONFIG_CMD_PCI=y
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+CONFIG_CMD_SF_TEST=y
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+CONFIG_CMD_PING=y
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+CONFIG_CMD_PXE=y
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+CONFIG_CMD_SMC=y
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+CONFIG_CMD_TFTPBOOT=y
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+CONFIG_CMD_TFTPSRV=y
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+CONFIG_CMD_UBI=y
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+CONFIG_CMD_UBI_RENAME=y
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+CONFIG_CMD_UBIFS=y
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+CONFIG_CMD_ASKENV=y
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+CONFIG_CMD_PART=y
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+CONFIG_CMD_PSTORE=y
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+CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
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+CONFIG_CMD_RARP=y
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+CONFIG_CMD_SETEXPR=y
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+CONFIG_CMD_SLEEP=y
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+CONFIG_CMD_SNTP=y
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+CONFIG_CMD_SOURCE=y
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+CONFIG_CMD_USB=y
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+CONFIG_CMD_UUID=y
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+CONFIG_DISPLAY_CPUINFO=y
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+CONFIG_DM_REGULATOR=y
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+CONFIG_DM_REGULATOR_FIXED=y
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+CONFIG_DM_REGULATOR_GPIO=y
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+CONFIG_DM_USB=y
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+CONFIG_HUSH_PARSER=y
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+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
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+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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+CONFIG_ENV_IS_IN_UBI=y
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+CONFIG_ENV_UBI_PART="ubi"
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+CONFIG_ENV_UBI_VOLUME="ubootenv"
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+CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
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+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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+CONFIG_VERSION_VARIABLE=y
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+CONFIG_PARTITION_UUIDS=y
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+CONFIG_NETCONSOLE=y
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+CONFIG_REGMAP=y
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+CONFIG_SYSCON=y
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+CONFIG_CLK=y
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+CONFIG_DM_MTD=y
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+CONFIG_DM_GPIO=y
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+CONFIG_PHY=y
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+CONFIG_PHY_MTK_TPHY=y
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+CONFIG_PHY_FIXED=y
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+CONFIG_DM_ETH=y
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+CONFIG_MEDIATEK_ETH=y
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+CONFIG_PCI=y
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+CONFIG_MTD=y
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+CONFIG_MTD_UBI_FASTMAP=y
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+CONFIG_DM_PCI=y
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+CONFIG_PCIE_MEDIATEK=y
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+CONFIG_PINCTRL=y
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+CONFIG_PINCONF=y
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+CONFIG_PINCTRL_MT7622=y
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+CONFIG_POWER_DOMAIN=y
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+CONFIG_PRE_CONSOLE_BUFFER=y
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+CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
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+CONFIG_MTK_POWER_DOMAIN=y
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+CONFIG_RAM=y
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+CONFIG_DM_SERIAL=y
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+CONFIG_MTK_SERIAL=y
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+CONFIG_SPI=y
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+CONFIG_DM_SPI=y
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+CONFIG_MTK_SPI_NAND=y
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+CONFIG_MTK_SPI_NAND_MTD=y
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+CONFIG_SYSRESET_WATCHDOG=y
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+CONFIG_WDT_MTK=y
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+CONFIG_LZO=y
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+CONFIG_ZSTD=y
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+CONFIG_HEXDUMP=y
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+CONFIG_RANDOM_UUID=y
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+CONFIG_REGEX=y
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+CONFIG_USB=y
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+CONFIG_USB_HOST=y
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+CONFIG_USB_XHCI_HCD=y
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+CONFIG_USB_XHCI_MTK=y
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+CONFIG_USB_STORAGE=y
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--- /dev/null
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+++ b/arch/arm/dts/mt7622-linksys-e8450-ubi.dts
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@@ -0,0 +1,195 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * Copyright (c) 2019 MediaTek Inc.
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+ * Author: Sam Shih <sam.shih@mediatek.com>
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+ */
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+
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+/dts-v1/;
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+#include "mt7622.dtsi"
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+#include "mt7622-u-boot.dtsi"
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+
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+/ {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ model = "mt7622-linksys-e8450-ubi";
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+ compatible = "mediatek,mt7622", "linksys,e8450-ubi";
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+ chosen {
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+ stdout-path = &uart0;
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+ tick-timer = &timer0;
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+ };
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+
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+ aliases {
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+ spi0 = &snand;
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+ };
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+
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+ gpio-keys {
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+ compatible = "gpio-keys";
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+
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+ factory {
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+ label = "reset";
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+ gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ wps {
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+ label = "wps";
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+ gpios = <&gpio 102 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+
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+ gpio-leds {
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+ compatible = "gpio-leds";
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+
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+ led_power: power_blue {
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+ label = "power:blue";
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+ gpios = <&gpio 95 GPIO_ACTIVE_LOW>;
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+ default-state = "on";
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+ };
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+
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+ power_orange {
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+ label = "power:orange";
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+ gpios = <&gpio 96 GPIO_ACTIVE_LOW>;
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+ default-state = "off";
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+ };
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+
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+ inet_blue {
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+ label = "inet:blue";
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+ gpios = <&gpio 97 GPIO_ACTIVE_LOW>;
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+ default-state = "off";
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+ };
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+
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+ inet_orange {
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+ label = "inet:orange";
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+ gpios = <&gpio 98 GPIO_ACTIVE_LOW>;
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+ default-state = "off";
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+ };
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+ };
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+
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+ memory@40000000 {
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+ device_type = "memory";
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+ reg = <0x40000000 0x20000000>;
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+ };
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+
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+ reg_1p8v: regulator-1p8v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "fixed-1.8V";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ };
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+
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+ reg_3p3v: regulator-3p3v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "fixed-3.3V";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ };
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+
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+ reg_5v: regulator-5v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "fixed-5V";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ };
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+};
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+
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+&pcie {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>;
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+ status = "okay";
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+
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+ pcie@0,0 {
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+ status = "okay";
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+ };
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+
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+ pcie@1,0 {
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+ status = "okay";
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+ };
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+};
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+
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+&pinctrl {
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+ pcie0_pins: pcie0-pins {
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+ mux {
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+ function = "pcie";
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+ groups = "pcie0_pad_perst",
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+ "pcie0_1_waken",
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+ "pcie0_1_clkreq";
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+ };
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+ };
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+
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+ pcie1_pins: pcie1-pins {
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+ mux {
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+ function = "pcie";
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+ groups = "pcie1_pad_perst",
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+ "pcie1_0_waken",
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+ "pcie1_0_clkreq";
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+ };
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+ };
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+
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+ snfi_pins: snfi-pins {
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+ mux {
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+ function = "flash";
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+ groups = "snfi";
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+ };
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+ };
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+
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+ uart0_pins: uart0 {
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+ mux {
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+ function = "uart";
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+ groups = "uart0_0_tx_rx" ;
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+ };
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+ };
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+
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+ watchdog_pins: watchdog-default {
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+ mux {
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+ function = "watchdog";
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+ groups = "watchdog";
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+ };
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+ };
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+};
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+
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+&snand {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&snfi_pins>;
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+ status = "okay";
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+ quad-spi;
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+};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_pins>;
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+ status = "okay";
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+};
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+
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+&watchdog {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&watchdog_pins>;
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+ status = "okay";
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+};
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+
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+ð {
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+ status = "okay";
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+ mediatek,gmac-id = <0>;
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+ phy-mode = "sgmii";
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+ mediatek,switch = "mt7531";
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+ reset-gpios = <&gpio 54 GPIO_ACTIVE_HIGH>;
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+
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+ fixed-link {
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+ speed = <1000>;
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+ full-duplex;
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+ };
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+};
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+
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+&ssusb {
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+ vusb33-supply = <®_3p3v>;
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+ vbus-supply = <®_5v>;
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+ status = "okay";
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+};
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+
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+&u3phy {
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+ status = "okay";
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+};
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -1007,6 +1007,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
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mt7622-rfb.dtb \
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mt7623a-unielec-u7623-02-emmc.dtb \
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mt7622-bananapi-bpi-r64.dtb \
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+ mt7622-linksys-e8450-ubi.dtb \
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mt7623n-bananapi-bpi-r2.dtb \
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mt7629-rfb.dtb \
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mt8512-bm1-emmc.dtb \
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--- /dev/null
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+++ b/linksys_e8450_env
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@@ -0,0 +1,57 @@
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+ethaddr_factory=mtd read spi-nand0 0x40080000 0x220000 0x20000 && env readmem -b ethaddr 0x4009fff4 0x6 ; setenv ethaddr_factory
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+ipaddr=192.168.1.1
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+serverip=192.168.1.254
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+loadaddr=0x48000000
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+bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi
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+bootconf=config-1
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+bootdelay=0
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+bootfile=openwrt-mediatek-mt7622-linksys_e8450-ubi-initramfs-recovery.itb
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+bootfile_bl2=openwrt-mediatek-mt7622-linksys_e8450-ubi-preloader.bin
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+bootfile_fip=openwrt-mediatek-mt7622-linksys_e8450-ubi-bl31-uboot.fip
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+bootfile_upg=openwrt-mediatek-mt7622-linksys_e8450-ubi-squashfs-sysupgrade.itb
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+bootled_pwr=power:blue
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+bootled_rec=inet:orange on
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+bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
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+bootmenu_default=0
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+bootmenu_delay=0
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+bootmenu_title= [0;34m( ( ( [1;39mOpenWrt[0;34m ) ) )[0m
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+bootmenu_0=Initialize environment.=run _firstboot
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+bootmenu_0d=Run default boot command.=run boot_default
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+bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
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+bootmenu_2=Boot production system from flash.=run boot_production ; run bootmenu_confirm_return
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+bootmenu_3=Boot recovery system from flash.=run boot_recovery ; run bootmenu_confirm_return
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+bootmenu_4=Load production system via TFTP then write to flash.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
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+bootmenu_5=Load recovery system via TFTP then write to flash.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
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+bootmenu_6=[31mLoad BL31+U-Boot FIP via TFTP then write to flash.[0m=run boot_tftp_write_fip ; run bootmenu_confirm_return
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+bootmenu_7=[31mLoad BL2 preloader via TFTP then write to flash.[0m=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
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+bootmenu_8=Reboot.=reset
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+bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
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+boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
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+boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
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+boot_production=led $bootled_pwr on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off
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+boot_recovery=led $bootled_rec on ; run ubi_read_recovery ; bootm $loadaddr#$bootconf ; ubi remove recovery ; led $bootled_rec off
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+boot_serial_write_bl2=loadx $loadaddr 115200 && run boot_write_bl2
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+boot_serial_write_fip=loadx $loadaddr 115200 && run boot_write_fip
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+boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
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+boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done
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+boot_tftp_production=tftpboot $loadaddr $bootfile_upg && iminfo $loadaddr && ubi part ubi && run ubi_write_production ubi_prepare_rootfs ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
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+boot_tftp_recovery=tftpboot $loadaddr $bootfile && iminfo $loadaddr && ubi part ubi && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
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+boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run boot_write_bl2
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+boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run boot_write_fip
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+boot_ubi=ubi part ubi && run boot_production ; run boot_recovery
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+boot_write_bl2=mtd erase bl2 && mtd write spi-nand0 $loadaddr 0x0 0x20000 && mtd write spi-nand0 $loadaddr 0x20000 0x20000 && mtd write spi-nand0 $loadaddr 0x40000 0x20000 && mtd write spi-nand0 $loadaddr 0x60000 0x20000
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+boot_write_fip=mtd erase fip && mtd write fip $loadaddr
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+check_ubi=ubi part ubi || run ubi_format
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+reset_factory=ubi part ubi ; ubi write 0x0 ubootenv 0x0 ; ubi write 0x0 ubootenv2 0x0 ; ubi remove rootfs_data
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+ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
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+ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
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+ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
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+ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
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+ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
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+ubi_write_production=ubi check fit && env exists replacevol && ubi remove fit ; if ubi check fit ; then else run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize ; fi
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+ubi_write_recovery=ubi check recovery && env exists replacevol && ubi remove recovery ; if ubi check recovery ; then else run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize ; fi
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+_create_env=ubi create ubootenv 0x100000 dynamic ; ubi create ubootenv2 0x100000 dynamic
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+_init_env=setenv _init_env ; if ubi check ubootenv && ubi check ubootenv2 ; then else run _create_env ; fi ; setenv _create_env ; saveenv || run ubi_format ; saveenv || run ubi_format
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+_firstboot=setenv _firstboot ; run _switch_to_menu ; run ethaddr_factory ; run check_ubi ; run _init_env ; run boot_first
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+_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
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+_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title [33m$ver[0m"
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