132 lines
3.9 KiB
Diff
132 lines
3.9 KiB
Diff
Instead of defining an enumeration with the FW specific values for the
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different clock rates, use the actual frequency instead. Also add a
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boolean to specify whether the clock is XTAL or not.
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Change all board files to reflect this.
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Additionally, this reverts commit 26f45c (ARM: OMAP2+: Legacy support
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for wl12xx when booted with devicetree), since this is not be needed
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anymore, now that DT support for WiLink is implemented.
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Cc: Tony Lindgren <tony@atomide.com>
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Cc: Sekhar Nori <nsekhar@ti.com>
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Signed-off-by: Luciano Coelho <coelho@ti.com>
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Reviewed-by: Felipe Balbi <balbi@ti.com>
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--- a/drivers/net/wireless/ti/wl12xx/main.c
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+++ b/drivers/net/wireless/ti/wl12xx/main.c
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@@ -1711,6 +1711,43 @@ static struct ieee80211_sta_ht_cap wl12x
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},
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};
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+static const struct wl12xx_clock wl12xx_refclock_table[] = {
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+ { 19200000, false, WL12XX_REFCLOCK_19 },
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+ { 26000000, false, WL12XX_REFCLOCK_26 },
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+ { 26000000, true, WL12XX_REFCLOCK_26_XTAL },
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+ { 38400000, false, WL12XX_REFCLOCK_38 },
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+ { 38400000, true, WL12XX_REFCLOCK_38_XTAL },
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+ { 52000000, false, WL12XX_REFCLOCK_52 },
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+ { 0, false, 0 }
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+};
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+
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+static const struct wl12xx_clock wl12xx_tcxoclock_table[] = {
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+ { 16368000, true, WL12XX_TCXOCLOCK_16_368 },
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+ { 16800000, true, WL12XX_TCXOCLOCK_16_8 },
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+ { 19200000, true, WL12XX_TCXOCLOCK_19_2 },
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+ { 26000000, true, WL12XX_TCXOCLOCK_26 },
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+ { 32736000, true, WL12XX_TCXOCLOCK_32_736 },
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+ { 33600000, true, WL12XX_TCXOCLOCK_33_6 },
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+ { 38400000, true, WL12XX_TCXOCLOCK_38_4 },
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+ { 52000000, true, WL12XX_TCXOCLOCK_52 },
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+ { 0, false, 0 }
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+};
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+
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+static int wl12xx_get_clock_idx(const struct wl12xx_clock *table,
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+ u32 freq, bool xtal)
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+{
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+ int i = 0;
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+
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+ while(table[i].freq != 0) {
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+ if ((table[i].freq == freq) &&
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+ (table[i].xtal == xtal))
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+ return table[i].hw_idx;
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+ i++;
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+ };
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+
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+ return -EINVAL;
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+}
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+
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static int wl12xx_setup(struct wl1271 *wl)
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{
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struct wl12xx_priv *priv = wl->priv;
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@@ -1732,7 +1769,16 @@ static int wl12xx_setup(struct wl1271 *w
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wl12xx_conf_init(wl);
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if (!fref_param) {
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- priv->ref_clock = pdata->board_ref_clock;
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+ priv->ref_clock = wl12xx_get_clock_idx(wl12xx_refclock_table,
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+ pdata->ref_clock_freq,
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+ pdata->ref_clock_xtal);
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+ if (priv->ref_clock < 0) {
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+ wl1271_error("Invalid ref_clock frequency (%d Hz, %s)",
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+ pdata->ref_clock_freq,
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+ pdata->ref_clock_xtal ? "XTAL" : "not XTAL");
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+
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+ return priv->ref_clock;
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+ }
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} else {
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if (!strcmp(fref_param, "19.2"))
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priv->ref_clock = WL12XX_REFCLOCK_19;
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@@ -1751,7 +1797,15 @@ static int wl12xx_setup(struct wl1271 *w
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}
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if (!tcxo_param) {
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- priv->tcxo_clock = pdata->board_tcxo_clock;
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+ priv->tcxo_clock = wl12xx_get_clock_idx(wl12xx_tcxoclock_table,
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+ pdata->tcxo_clock_freq,
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+ true);
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+ if (priv->tcxo_clock < 0) {
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+ wl1271_error("Invalid tcxo_clock frequency (%d Hz)",
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+ pdata->tcxo_clock_freq);
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+
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+ return priv->tcxo_clock;
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+ }
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} else {
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if (!strcmp(tcxo_param, "19.2"))
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priv->tcxo_clock = WL12XX_TCXOCLOCK_19_2;
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--- a/drivers/net/wireless/ti/wl12xx/wl12xx.h
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+++ b/drivers/net/wireless/ti/wl12xx/wl12xx.h
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@@ -79,4 +79,32 @@ struct wl12xx_priv {
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struct wl127x_rx_mem_pool_addr *rx_mem_addr;
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};
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+/* Reference clock values */
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+enum {
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+ WL12XX_REFCLOCK_19 = 0, /* 19.2 MHz */
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+ WL12XX_REFCLOCK_26 = 1, /* 26 MHz */
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+ WL12XX_REFCLOCK_38 = 2, /* 38.4 MHz */
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+ WL12XX_REFCLOCK_52 = 3, /* 52 MHz */
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+ WL12XX_REFCLOCK_38_XTAL = 4, /* 38.4 MHz, XTAL */
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+ WL12XX_REFCLOCK_26_XTAL = 5, /* 26 MHz, XTAL */
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+};
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+
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+/* TCXO clock values */
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+enum {
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+ WL12XX_TCXOCLOCK_19_2 = 0, /* 19.2MHz */
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+ WL12XX_TCXOCLOCK_26 = 1, /* 26 MHz */
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+ WL12XX_TCXOCLOCK_38_4 = 2, /* 38.4MHz */
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+ WL12XX_TCXOCLOCK_52 = 3, /* 52 MHz */
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+ WL12XX_TCXOCLOCK_16_368 = 4, /* 16.368 MHz */
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+ WL12XX_TCXOCLOCK_32_736 = 5, /* 32.736 MHz */
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+ WL12XX_TCXOCLOCK_16_8 = 6, /* 16.8 MHz */
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+ WL12XX_TCXOCLOCK_33_6 = 7, /* 33.6 MHz */
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+};
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+
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+struct wl12xx_clock {
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+ u32 freq;
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+ bool xtal;
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+ u8 hw_idx;
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+};
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+
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#endif /* __WL12XX_PRIV_H__ */
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