f07e572f64
bcm2708: boot tested on RPi B+ v1.2 bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G bcm2710: boot tested on RPi 3B v1.2 bcm2711: boot tested on RPi 4B v1.1 4G Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
159 lines
4.9 KiB
Diff
159 lines
4.9 KiB
Diff
From cbf5cde9c460eae458829a7b357cea6734c4755b Mon Sep 17 00:00:00 2001
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From: Stefan Wahren <wahrenst@gmx.net>
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Date: Sat, 4 May 2019 17:06:15 +0200
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Subject: [PATCH] hwrng: iproc-rng200: Add BCM2838 support
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The HWRNG on the BCM2838 is compatible to iproc-rng200, so add the
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support to this driver instead of bcm2835-rng.
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Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
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---
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drivers/char/hw_random/Kconfig | 4 +-
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drivers/char/hw_random/iproc-rng200.c | 81 +++++++++++++++++++++++++--
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2 files changed, 79 insertions(+), 6 deletions(-)
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--- a/drivers/char/hw_random/Kconfig
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+++ b/drivers/char/hw_random/Kconfig
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@@ -90,11 +90,11 @@ config HW_RANDOM_BCM2835
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config HW_RANDOM_IPROC_RNG200
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tristate "Broadcom iProc/STB RNG200 support"
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- depends on ARCH_BCM_IPROC || ARCH_BRCMSTB
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+ depends on ARCH_BCM_IPROC || ARCH_BCM2835 || ARCH_BRCMSTB
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default HW_RANDOM
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---help---
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This driver provides kernel-side support for the RNG200
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- hardware found on the Broadcom iProc and STB SoCs.
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+ hardware found on the Broadcom iProc, BCM2838 and STB SoCs.
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To compile this driver as a module, choose M here: the
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module will be called iproc-rng200
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--- a/drivers/char/hw_random/iproc-rng200.c
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+++ b/drivers/char/hw_random/iproc-rng200.c
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@@ -29,6 +29,7 @@
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#define RNG_CTRL_RNG_RBGEN_MASK 0x00001FFF
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#define RNG_CTRL_RNG_RBGEN_ENABLE 0x00000001
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#define RNG_CTRL_RNG_RBGEN_DISABLE 0x00000000
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+#define RNG_CTRL_RNG_DIV_CTRL_SHIFT 13
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#define RNG_SOFT_RESET_OFFSET 0x04
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#define RNG_SOFT_RESET 0x00000001
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@@ -36,16 +37,23 @@
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#define RBG_SOFT_RESET_OFFSET 0x08
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#define RBG_SOFT_RESET 0x00000001
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+#define RNG_TOTAL_BIT_COUNT_OFFSET 0x0C
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+
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+#define RNG_TOTAL_BIT_COUNT_THRESHOLD_OFFSET 0x10
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+
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#define RNG_INT_STATUS_OFFSET 0x18
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#define RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK 0x80000000
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#define RNG_INT_STATUS_STARTUP_TRANSITIONS_MET_IRQ_MASK 0x00020000
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#define RNG_INT_STATUS_NIST_FAIL_IRQ_MASK 0x00000020
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#define RNG_INT_STATUS_TOTAL_BITS_COUNT_IRQ_MASK 0x00000001
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+#define RNG_INT_ENABLE_OFFSET 0x1C
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+
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#define RNG_FIFO_DATA_OFFSET 0x20
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#define RNG_FIFO_COUNT_OFFSET 0x24
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#define RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK 0x000000FF
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+#define RNG_FIFO_COUNT_RNG_FIFO_THRESHOLD_SHIFT 8
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struct iproc_rng200_dev {
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struct hwrng rng;
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@@ -166,6 +174,64 @@ static int iproc_rng200_init(struct hwrn
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return 0;
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}
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+static int bcm2838_rng200_read(struct hwrng *rng, void *buf, size_t max,
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+ bool wait)
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+{
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+ struct iproc_rng200_dev *priv = to_rng_priv(rng);
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+ u32 max_words = max / sizeof(u32);
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+ u32 num_words, count, val;
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+
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+ /* ensure warm up period has elapsed */
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+ while (1) {
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+ val = ioread32(priv->base + RNG_TOTAL_BIT_COUNT_OFFSET);
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+ if (val > 16)
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+ break;
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+ cpu_relax();
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+ }
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+
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+ /* ensure fifo is not empty */
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+ while (1) {
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+ num_words = ioread32(priv->base + RNG_FIFO_COUNT_OFFSET) &
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+ RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK;
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+ if (num_words)
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+ break;
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+ if (!wait)
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+ return 0;
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+ cpu_relax();
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+ }
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+
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+ if (num_words > max_words)
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+ num_words = max_words;
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+
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+ for (count = 0; count < num_words; count++) {
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+ ((u32 *)buf)[count] = ioread32(priv->base +
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+ RNG_FIFO_DATA_OFFSET);
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+ }
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+
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+ return num_words * sizeof(u32);
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+}
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+
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+static int bcm2838_rng200_init(struct hwrng *rng)
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+{
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+ struct iproc_rng200_dev *priv = to_rng_priv(rng);
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+ uint32_t val;
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+
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+ if (ioread32(priv->base + RNG_CTRL_OFFSET) & RNG_CTRL_RNG_RBGEN_MASK)
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+ return 0;
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+
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+ /* initial numbers generated are "less random" so will be discarded */
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+ val = 0x40000;
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+ iowrite32(val, priv->base + RNG_TOTAL_BIT_COUNT_THRESHOLD_OFFSET);
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+ /* min fifo count to generate full interrupt */
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+ val = 2 << RNG_FIFO_COUNT_RNG_FIFO_THRESHOLD_SHIFT;
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+ iowrite32(val, priv->base + RNG_FIFO_COUNT_OFFSET);
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+ /* enable the rng - 1Mhz sample rate */
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+ val = (0x3 << RNG_CTRL_RNG_DIV_CTRL_SHIFT) | RNG_CTRL_RNG_RBGEN_MASK;
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+ iowrite32(val, priv->base + RNG_CTRL_OFFSET);
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+
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+ return 0;
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+}
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+
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static void iproc_rng200_cleanup(struct hwrng *rng)
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{
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struct iproc_rng200_dev *priv = to_rng_priv(rng);
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@@ -202,10 +268,16 @@ static int iproc_rng200_probe(struct pla
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return PTR_ERR(priv->base);
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}
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- priv->rng.name = "iproc-rng200",
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- priv->rng.read = iproc_rng200_read,
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- priv->rng.init = iproc_rng200_init,
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- priv->rng.cleanup = iproc_rng200_cleanup,
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+ priv->rng.name = pdev->name;
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+ priv->rng.cleanup = iproc_rng200_cleanup;
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+
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+ if (of_device_is_compatible(dev->of_node, "brcm,bcm2838-rng200")) {
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+ priv->rng.init = bcm2838_rng200_init;
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+ priv->rng.read = bcm2838_rng200_read;
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+ } else {
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+ priv->rng.init = iproc_rng200_init;
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+ priv->rng.read = iproc_rng200_read;
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+ }
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/* Register driver */
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ret = devm_hwrng_register(dev, &priv->rng);
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@@ -223,6 +295,7 @@ static const struct of_device_id iproc_r
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{ .compatible = "brcm,bcm7211-rng200", },
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{ .compatible = "brcm,bcm7278-rng200", },
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{ .compatible = "brcm,iproc-rng200", },
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+ { .compatible = "brcm,bcm2838-rng200"},
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{},
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};
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MODULE_DEVICE_TABLE(of, iproc_rng200_of_match);
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