f0a5f24217
- two upstreamed patches removed - compile tested all targets using 4.1 - run tested ar71xx Signed-off-by: Roman Yeryomin <roman@advem.lv> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 47694
167 lines
5.1 KiB
Diff
167 lines
5.1 KiB
Diff
From d6d7a7dc1b7db2e3d496bf67b30abc894edbc4bd Mon Sep 17 00:00:00 2001
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From: Sascha Hauer <s.hauer@pengutronix.de>
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Date: Tue, 9 Jun 2015 10:46:59 +0200
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Subject: [PATCH 06/76] soc: mediatek: Add infracfg misc driver support
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This adds support for some miscellaneous bits of the infracfg controller.
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The mtk_infracfg_set/clear_bus_protection functions are necessary for
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the scpsys power domain driver to handle the bus protection bits which
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are contained in the infacfg register space.
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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---
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drivers/soc/mediatek/Kconfig | 9 ++++
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drivers/soc/mediatek/Makefile | 1 +
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drivers/soc/mediatek/mtk-infracfg.c | 91 +++++++++++++++++++++++++++++++++
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include/linux/soc/mediatek/infracfg.h | 26 ++++++++++
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4 files changed, 127 insertions(+)
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create mode 100644 drivers/soc/mediatek/mtk-infracfg.c
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create mode 100644 include/linux/soc/mediatek/infracfg.h
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--- a/drivers/soc/mediatek/Kconfig
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+++ b/drivers/soc/mediatek/Kconfig
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@@ -1,6 +1,15 @@
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#
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# MediaTek SoC drivers
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#
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+config MTK_INFRACFG
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+ bool "MediaTek INFRACFG Support"
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+ depends on ARCH_MEDIATEK
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+ select REGMAP
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+ help
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+ Say yes here to add support for the MediaTek INFRACFG controller. The
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+ INFRACFG controller contains various infrastructure registers not
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+ directly associated to any device.
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+
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config MTK_PMIC_WRAP
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tristate "MediaTek PMIC Wrapper Support"
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depends on ARCH_MEDIATEK
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--- a/drivers/soc/mediatek/Makefile
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+++ b/drivers/soc/mediatek/Makefile
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@@ -1 +1,2 @@
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+obj-$(CONFIG_MTK_INFRACFG) += mtk-infracfg.o
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obj-$(CONFIG_MTK_PMIC_WRAP) += mtk-pmic-wrap.o
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--- /dev/null
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+++ b/drivers/soc/mediatek/mtk-infracfg.c
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@@ -0,0 +1,91 @@
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+/*
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+ * Copyright (c) 2015 Pengutronix, Sascha Hauer <kernel@pengutronix.de>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ */
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+
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+#include <linux/export.h>
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+#include <linux/jiffies.h>
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+#include <linux/regmap.h>
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+#include <linux/soc/mediatek/infracfg.h>
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+#include <asm/processor.h>
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+
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+#define INFRA_TOPAXI_PROTECTEN 0x0220
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+#define INFRA_TOPAXI_PROTECTSTA1 0x0228
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+
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+/**
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+ * mtk_infracfg_set_bus_protection - enable bus protection
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+ * @regmap: The infracfg regmap
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+ * @mask: The mask containing the protection bits to be enabled.
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+ *
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+ * This function enables the bus protection bits for disabled power
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+ * domains so that the system does not hanf when some unit accesses the
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+ * bus while in power down.
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+ */
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+int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask)
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+{
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+ unsigned long expired;
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+ u32 val;
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+ int ret;
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+
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+ regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, mask);
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+
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+ expired = jiffies + HZ;
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+
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+ while (1) {
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+ ret = regmap_read(infracfg, INFRA_TOPAXI_PROTECTSTA1, &val);
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+ if (ret)
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+ return ret;
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+
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+ if ((val & mask) == mask)
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+ break;
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+
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+ cpu_relax();
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+ if (time_after(jiffies, expired))
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+ return -EIO;
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+ }
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+
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+ return 0;
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+}
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+
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+/**
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+ * mtk_infracfg_clear_bus_protection - disable bus protection
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+ * @regmap: The infracfg regmap
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+ * @mask: The mask containing the protection bits to be disabled.
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+ *
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+ * This function disables the bus protection bits previously enabled with
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+ * mtk_infracfg_set_bus_protection.
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+ */
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+int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask)
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+{
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+ unsigned long expired;
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+ int ret;
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+
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+ regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, 0);
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+
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+ expired = jiffies + HZ;
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+
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+ while (1) {
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+ u32 val;
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+
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+ ret = regmap_read(infracfg, INFRA_TOPAXI_PROTECTSTA1, &val);
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+ if (ret)
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+ return ret;
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+
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+ if (!(val & mask))
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+ break;
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+
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+ cpu_relax();
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+ if (time_after(jiffies, expired))
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+ return -EIO;
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+ }
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+
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+ return 0;
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+}
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--- /dev/null
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+++ b/include/linux/soc/mediatek/infracfg.h
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@@ -0,0 +1,26 @@
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+#ifndef __SOC_MEDIATEK_INFRACFG_H
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+#define __SOC_MEDIATEK_INFRACFG_H
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+
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+#define MT8173_TOP_AXI_PROT_EN_MCI_M2 BIT(0)
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+#define MT8173_TOP_AXI_PROT_EN_MM_M0 BIT(1)
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+#define MT8173_TOP_AXI_PROT_EN_MM_M1 BIT(2)
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+#define MT8173_TOP_AXI_PROT_EN_MMAPB_S BIT(6)
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+#define MT8173_TOP_AXI_PROT_EN_L2C_M2 BIT(9)
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+#define MT8173_TOP_AXI_PROT_EN_L2SS_SMI BIT(11)
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+#define MT8173_TOP_AXI_PROT_EN_L2SS_ADD BIT(12)
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+#define MT8173_TOP_AXI_PROT_EN_CCI_M2 BIT(13)
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+#define MT8173_TOP_AXI_PROT_EN_MFG_S BIT(14)
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+#define MT8173_TOP_AXI_PROT_EN_PERI_M0 BIT(15)
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+#define MT8173_TOP_AXI_PROT_EN_PERI_M1 BIT(16)
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+#define MT8173_TOP_AXI_PROT_EN_DEBUGSYS BIT(17)
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+#define MT8173_TOP_AXI_PROT_EN_CQ_DMA BIT(18)
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+#define MT8173_TOP_AXI_PROT_EN_GCPU BIT(19)
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+#define MT8173_TOP_AXI_PROT_EN_IOMMU BIT(20)
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+#define MT8173_TOP_AXI_PROT_EN_MFG_M0 BIT(21)
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+#define MT8173_TOP_AXI_PROT_EN_MFG_M1 BIT(22)
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+#define MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT BIT(23)
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+
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+int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask);
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+int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask);
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+
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+#endif /* __SOC_MEDIATEK_INFRACFG_H */
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