Openwrt/target/linux/ramips/dts/mt7620a_zbtlink_zbt-ape522ii.dts
Adrian Schmutzler 48047b3a5c ramips/mt7620: Name DTS files based on scheme
As introduced with ath79, DTS files for ramips will now be labelled
soc_vendor_device.dts(i). With this change, DTS files can be
selected automatically without further manual links.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2019-07-10 17:36:29 +02:00

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/dts-v1/;
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "zbtlink,zbt-ape522ii", "ralink,mt7620a-soc";
model = "ZBT-APE522II";
chosen {
bootargs = "console=ttyS0,115200";
};
leds {
compatible = "gpio-leds";
sys1 {
label = "zbt-ape522ii:green:sys1";
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
};
sys2 {
label = "zbt-ape522ii:green:sys2";
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
};
sys3 {
label = "zbt-ape522ii:green:sys3";
gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
};
sys4 {
label = "zbt-ape522ii:green:sys4";
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
wlan2g4 {
label = "zbt-ape522ii:green:wlan2g4";
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
reset {
label = "reset";
gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_RESTART>;
};
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&gpio3 {
status = "okay";
};
&spi0 {
status = "okay";
m25p80@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0xf80000>;
};
};
};
};
&ethernet {
pinctrl-names = "default";
pinctrl-0 = <&ephy_pins>;
mtd-mac-address = <&factory 0x4>;
mediatek,portmap = "wllll";
};
&wmac {
ralink,mtd-eeprom = <&factory 0>;
pinctrl-names = "default";
pinctrl-0 = <&pa_pins>;
};
&pcie {
status = "okay";
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&pinctrl {
state_default: pinctrl0 {
gpio {
ralink,group = "wled", "i2c", "uartf", "wdt";
ralink,function = "gpio";
};
};
};