7d1cd9dfab
Fix "cfe-" string length copy.
Check if there's an extra byte a.b.c-d.e / a.b.c-d.e-f.
Add support for Huawei CFE versions ("cfe-vd").
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Patchwork: http://patchwork.openwrt.org/patch/3766/
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 37101
135 lines
3.9 KiB
Diff
135 lines
3.9 KiB
Diff
From 261ee140e75615351128eee497e6bbd76686784b Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jonas.gorski@gmail.com>
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Date: Sat, 12 Nov 2011 12:18:26 +0100
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Subject: [PATCH 51/72] MIPS: BCM63XX: add HS SPI platform device and register
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it
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Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
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---
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arch/mips/bcm63xx/Makefile | 4 +-
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arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +
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arch/mips/bcm63xx/dev-hsspi.c | 57 ++++++++++++++++++++
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.../include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h | 20 +++++++
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4 files changed, 81 insertions(+), 2 deletions(-)
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create mode 100644 arch/mips/bcm63xx/dev-hsspi.c
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create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h
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--- a/arch/mips/bcm63xx/Makefile
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+++ b/arch/mips/bcm63xx/Makefile
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@@ -1,7 +1,8 @@
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obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
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setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
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- dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o dev-wdt.o \
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- dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
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+ dev-hsspi.o dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o \
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+ dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \
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+ usb-common.o
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obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
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obj-y += boards/
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--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
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+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
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@@ -26,6 +26,7 @@
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#include <bcm63xx_dev_enet.h>
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#include <bcm63xx_dev_dsp.h>
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#include <bcm63xx_dev_flash.h>
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+#include <bcm63xx_dev_hsspi.h>
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#include <bcm63xx_dev_pcmcia.h>
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#include <bcm63xx_dev_spi.h>
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#include <bcm63xx_dev_usb_ehci.h>
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@@ -1003,6 +1004,7 @@ int __init board_register_devices(void)
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pr_err(PFX "failed to register fallback SPROM\n");
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}
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#endif
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+ bcm63xx_hsspi_register();
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bcm63xx_spi_register();
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--- /dev/null
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+++ b/arch/mips/bcm63xx/dev-hsspi.c
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@@ -0,0 +1,60 @@
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+/*
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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+ * for more details.
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+ *
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+ * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
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+ */
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+
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+#include <linux/init.h>
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+#include <linux/kernel.h>
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+#include <linux/platform_device.h>
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+
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+#include <bcm63xx_cpu.h>
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+#include <bcm63xx_dev_hsspi.h>
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+#include <bcm63xx_regs.h>
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+
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+static struct resource spi_resources[] = {
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+ {
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+ .start = -1, /* filled at runtime */
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+ .end = -1, /* filled at runtime */
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+ .flags = IORESOURCE_MEM,
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+ },
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+ {
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+ .start = -1, /* filled at runtime */
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct bcm63xx_hsspi_pdata spi_pdata = {
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+ .bus_num = 1,
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+};
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+
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+static struct platform_device bcm63xx_hsspi_device = {
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+ .name = "bcm63xx-hsspi",
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+ .id = 0,
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+ .num_resources = ARRAY_SIZE(spi_resources),
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+ .resource = spi_resources,
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+ .dev = {
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+ .platform_data = &spi_pdata,
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+ },
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+};
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+
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+int __init bcm63xx_hsspi_register(void)
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+{
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+
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+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362())
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+ return -ENODEV;
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+
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+ spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
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+ spi_resources[0].end = spi_resources[0].start;
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+ spi_resources[0].end += RSET_HSSPI_SIZE - 1;
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+ spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI);
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+
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+ if (BCMCPU_IS_6328())
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+ spi_pdata.speed_hz = HSSPI_PLL_HZ_6328;
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+ else if (BCMCPU_IS_6362())
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+ spi_pdata.speed_hz = HSSPI_PLL_HZ_6362;
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+
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+ return platform_device_register(&bcm63xx_hsspi_device);
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+}
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--- /dev/null
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h
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@@ -0,0 +1,21 @@
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+#ifndef BCM63XX_DEV_HSSPI_H
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+#define BCM63XX_DEV_HSSPI_H
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+
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+#include <linux/types.h>
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+#include <bcm63xx_io.h>
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+#include <bcm63xx_regs.h>
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+
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+int __init bcm63xx_hsspi_register(void);
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+
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+struct bcm63xx_hsspi_pdata {
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+ int bus_num;
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+ u32 speed_hz;
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+};
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+
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+#define bcm_hsspi_readl(o) bcm_rset_readl(RSET_HSSPI, (o))
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+#define bcm_hsspi_writel(v, o) bcm_rset_writel(RSET_HSSPI, (v), (o))
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+
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+#define HSSPI_PLL_HZ_6328 133333333
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+#define HSSPI_PLL_HZ_6362 400000000
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+
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+#endif /* BCM63XX_DEV_HSSPI_H */
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