1baeede939
* Accept transfers without bits_per_word set. * Work around the inability of the hardware of keeping CS asserted. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 34320
280 lines
7.3 KiB
Diff
280 lines
7.3 KiB
Diff
From 0f2ae1e1282ff64f74a5e36f7da874f94911225e Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jonas.gorski@gmail.com>
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Date: Wed, 14 Nov 2012 22:22:33 +0100
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Subject: [PATCH] spi/bcm63xx: fix multi transfer messages
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The BCM63XX SPI controller does not support keeping CS asserted after
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sending its buffer. This breaks common usages like spi_write_then_read,
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where it is expected to be kept active during the whole transfers.
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Work around this by combining the transfers into one if the buffer
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allows. For spi_write_then_read, use the prepend byte feature to write
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to "prepend" the write if it is less than 15 bytes, allowing the whole
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fifo size for the read.
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Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
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---
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Tested on a SPI conntected switch which required keeping CS active between
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the register read command and reading the register contents.
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Based on Mark's spi/next.
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Not sure if this is stable material, as it's quite invasive.
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drivers/spi/spi-bcm63xx.c | 172 ++++++++++++++++++++++++++++++---------------
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1 file changed, 117 insertions(+), 55 deletions(-)
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--- a/drivers/spi/spi-bcm63xx.c
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+++ b/drivers/spi/spi-bcm63xx.c
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@@ -38,6 +38,8 @@
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#define PFX KBUILD_MODNAME
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#define DRV_VER "0.1.2"
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+#define BCM63XX_SPI_MAX_PREPEND 15
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+
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struct bcm63xx_spi {
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struct completion done;
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@@ -50,16 +52,10 @@ struct bcm63xx_spi {
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unsigned int msg_type_shift;
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unsigned int msg_ctl_width;
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- /* Data buffers */
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- const unsigned char *tx_ptr;
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- unsigned char *rx_ptr;
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-
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/* data iomem */
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u8 __iomem *tx_io;
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const u8 __iomem *rx_io;
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- int remaining_bytes;
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-
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struct clk *clk;
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struct platform_device *pdev;
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};
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@@ -184,50 +180,60 @@ static int bcm63xx_spi_setup(struct spi_
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return 0;
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}
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-/* Fill the TX FIFO with as many bytes as possible */
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-static void bcm63xx_spi_fill_tx_fifo(struct bcm63xx_spi *bs)
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-{
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- u8 size;
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-
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- /* Fill the Tx FIFO with as many bytes as possible */
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- size = bs->remaining_bytes < bs->fifo_size ? bs->remaining_bytes :
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- bs->fifo_size;
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- memcpy_toio(bs->tx_io, bs->tx_ptr, size);
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- bs->remaining_bytes -= size;
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-}
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-
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static unsigned int bcm63xx_txrx_bufs(struct spi_device *spi,
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- struct spi_transfer *t)
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+ struct spi_transfer *first,
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+ unsigned int n_transfers)
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{
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struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master);
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u16 msg_ctl;
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u16 cmd;
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+ unsigned int i, timeout, total_len = 0, prepend_len = 0, len = 0;
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+ struct spi_transfer *t = first;
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+ u8 rx_tail;
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+ bool do_rx = false;
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+ bool do_tx = false;
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/* Disable the CMD_DONE interrupt */
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bcm_spi_writeb(bs, 0, SPI_INT_MASK);
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- dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n",
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- t->tx_buf, t->rx_buf, t->len);
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+ if (n_transfers > 1 && t->tx_buf && t->len <= BCM63XX_SPI_MAX_PREPEND)
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+ prepend_len = t->len;
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+
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+ /* prepare the buffer */
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+ for (i = 0; i < n_transfers; i++) {
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+ if (t->tx_buf) {
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+ do_tx = true;
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+ memcpy_toio(bs->tx_io + total_len, t->tx_buf, t->len);
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+
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+ /* don't prepend more than one tx */
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+ if (t != first)
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+ prepend_len = 0;
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+ }
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+
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+ if (t->rx_buf) {
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+ do_rx = true;
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+ if (t == first)
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+ prepend_len = 0;
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+ }
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- /* Transmitter is inhibited */
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- bs->tx_ptr = t->tx_buf;
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- bs->rx_ptr = t->rx_buf;
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-
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- if (t->tx_buf) {
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- bs->remaining_bytes = t->len;
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- bcm63xx_spi_fill_tx_fifo(bs);
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+ total_len += t->len;
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+
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+ t = list_entry(t->transfer_list.next, struct spi_transfer,
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+ transfer_list);
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}
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+ len = total_len - prepend_len;
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+
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init_completion(&bs->done);
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/* Fill in the Message control register */
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- msg_ctl = (t->len << SPI_BYTE_CNT_SHIFT);
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+ msg_ctl = (len << SPI_BYTE_CNT_SHIFT);
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- if (t->rx_buf && t->tx_buf)
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+ if (do_rx && do_tx && prepend_len == 0)
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msg_ctl |= (SPI_FD_RW << bs->msg_type_shift);
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- else if (t->rx_buf)
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+ else if (do_rx)
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msg_ctl |= (SPI_HD_R << bs->msg_type_shift);
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- else if (t->tx_buf)
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+ else if (do_tx)
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msg_ctl |= (SPI_HD_W << bs->msg_type_shift);
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switch (bs->msg_ctl_width) {
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@@ -241,14 +247,41 @@ static unsigned int bcm63xx_txrx_bufs(st
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/* Issue the transfer */
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cmd = SPI_CMD_START_IMMEDIATE;
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- cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT);
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+ cmd |= (prepend_len << SPI_CMD_PREPEND_BYTE_CNT_SHIFT);
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cmd |= (spi->chip_select << SPI_CMD_DEVICE_ID_SHIFT);
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bcm_spi_writew(bs, cmd, SPI_CMD);
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/* Enable the CMD_DONE interrupt */
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bcm_spi_writeb(bs, SPI_INTR_CMD_DONE, SPI_INT_MASK);
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- return t->len - bs->remaining_bytes;
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+ timeout = wait_for_completion_timeout(&bs->done, HZ);
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+ if (!timeout)
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+ return -ETIMEDOUT;
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+
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+ /* read out all data */
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+ rx_tail = bcm_spi_readb(bs, SPI_RX_TAIL);
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+
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+ if (do_rx && rx_tail != len)
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+ return -EINVAL;
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+
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+ if (!rx_tail)
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+ return total_len;
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+
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+ len = 0;
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+ t = first;
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+ /* Read out all the data */
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+ for (i = 0; i < n_transfers; i++) {
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+ if (t->rx_buf)
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+ memcpy_fromio(t->rx_buf, bs->rx_io + len, t->len);
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+
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+ if (t != first || prepend_len == 0)
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+ len += t->len;
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+
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+ t = list_entry(t->transfer_list.next, struct spi_transfer,
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+ transfer_list);
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+ }
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+
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+ return total_len;
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}
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static int bcm63xx_spi_prepare_transfer(struct spi_master *master)
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@@ -273,42 +306,71 @@ static int bcm63xx_spi_transfer_one(stru
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struct spi_message *m)
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{
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struct bcm63xx_spi *bs = spi_master_get_devdata(master);
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- struct spi_transfer *t;
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+ struct spi_transfer *t, *first = NULL;
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struct spi_device *spi = m->spi;
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int status = 0;
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- unsigned int timeout = 0;
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+ unsigned int n_transfers = 0, total_len = 0;
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+ bool can_use_prepend = false;
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+ /*
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+ * This SPI controller does not support keeping CS active after a
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+ * transfer, so we need to combine the transfers into one until we may
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+ * deassert CS.
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+ */
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list_for_each_entry(t, &m->transfers, transfer_list) {
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- unsigned int len = t->len;
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- u8 rx_tail;
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-
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status = bcm63xx_spi_check_transfer(spi, t);
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if (status < 0)
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goto exit;
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- /* configure adapter for a new transfer */
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- bcm63xx_spi_setup_transfer(spi, t);
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+ if (!first)
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+ first = t;
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- while (len) {
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- /* send the data */
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- len -= bcm63xx_txrx_bufs(spi, t);
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-
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- timeout = wait_for_completion_timeout(&bs->done, HZ);
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- if (!timeout) {
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- status = -ETIMEDOUT;
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- goto exit;
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- }
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+ n_transfers++;
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+ total_len += t->len;
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+
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+ if (n_transfers == 2 && !first->rx_buf && !t->tx_buf &&
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+ first->len <= BCM63XX_SPI_MAX_PREPEND)
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+ can_use_prepend = true;
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+ else if (can_use_prepend && t->tx_buf)
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+ can_use_prepend = false;
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+
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+ if ((can_use_prepend &&
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+ total_len > (bs->fifo_size + BCM63XX_SPI_MAX_PREPEND)) ||
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+ (!can_use_prepend && total_len > bs->fifo_size)) {
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+ status = -EINVAL;
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+ goto exit;
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+ }
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- /* read out all data */
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- rx_tail = bcm_spi_readb(bs, SPI_RX_TAIL);
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+ /* all transfers have to be made at the same speed */
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+ if (t->speed_hz != first->speed_hz) {
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+ status = -EINVAL;
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+ goto exit;
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+ }
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- /* Read out all the data */
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- if (rx_tail)
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- memcpy_fromio(bs->rx_ptr, bs->rx_io, rx_tail);
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+ /* CS will be deasserted directly after the transfer */
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+ if (t->delay_usecs) {
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+ status = -EINVAL;
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+ goto exit;
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}
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- m->actual_length += t->len;
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+ if (t->cs_change ||
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+ list_is_last(&t->transfer_list, &m->transfers)) {
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+ /* configure adapter for a new transfer */
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+ bcm63xx_spi_setup_transfer(spi, first);
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+
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+ status = bcm63xx_txrx_bufs(spi, first, n_transfers);
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+ if (status < 0)
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+ goto exit;
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+
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+ m->actual_length += status;
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+ first = NULL;
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+ status = 0;
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+ n_transfers = 0;
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+ total_len = 0;
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+ can_use_prepend = false;
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+ }
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}
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+
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exit:
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m->status = status;
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spi_finalize_current_message(master);
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