bb5a18ff92
This is compile tested only, please run test and report back. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 43797
24 lines
787 B
Diff
24 lines
787 B
Diff
--- a/drivers/net/ethernet/freescale/gianfar.c
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+++ b/drivers/net/ethernet/freescale/gianfar.c
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@@ -1050,10 +1050,16 @@ static int gfar_probe(struct platform_de
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udelay(2);
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tempval = 0;
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- if (!priv->pause_aneg_en && priv->tx_pause_en)
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- tempval |= MACCFG1_TX_FLOW;
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- if (!priv->pause_aneg_en && priv->rx_pause_en)
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- tempval |= MACCFG1_RX_FLOW;
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+ /*
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+ * Do not enable flow control on chips earlier than rev 1.1,
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+ * because of the eTSEC27 erratum
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+ */
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+ if ((mfspr(SPRN_SVR) & 0xffff) >= 0x0011) {
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+ if (!priv->pause_aneg_en && priv->tx_pause_en)
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+ tempval |= MACCFG1_TX_FLOW;
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+ if (!priv->pause_aneg_en && priv->rx_pause_en)
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+ tempval |= MACCFG1_RX_FLOW;
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+ }
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/* the soft reset bit is not self-resetting, so we need to
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* clear it before resuming normal operation
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*/
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