94 lines
2.6 KiB
Diff
94 lines
2.6 KiB
Diff
diff -ur gdb-6.3/sim/arm/iwmmxt.c gdb-6.3-owrt/sim/arm/iwmmxt.c
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--- gdb-6.3/sim/arm/iwmmxt.c 2003-03-27 18:13:33.000000000 +0100
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+++ gdb-6.3-owrt/sim/arm/iwmmxt.c 2006-04-12 15:06:03.000000000 +0200
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@@ -2114,7 +2114,7 @@
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s = (signed long) a * (signed long) b;
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- (signed long long) t += s;
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+ t = t + (ARMdword) s;
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}
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else
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{
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@@ -2130,7 +2130,7 @@
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wR [BITS (12, 15)] = 0;
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if (BIT (21)) /* Signed. */
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- (signed long long) wR[BITS (12, 15)] += (signed long long) t;
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+ wR[BITS (12, 15)] += t;
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else
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wR [BITS (12, 15)] += t;
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@@ -2166,7 +2166,7 @@
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b = wRHALF (BITS (0, 3), i * 2);
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b = EXTEND16 (b);
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- (signed long) s1 = a * b;
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+ s1 = (ARMdword) (a * b);
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a = wRHALF (BITS (16, 19), i * 2 + 1);
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a = EXTEND16 (a);
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@@ -2174,7 +2174,7 @@
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b = wRHALF (BITS (0, 3), i * 2 + 1);
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b = EXTEND16 (b);
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- (signed long) s2 = a * b;
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+ s2 = (ARMdword) (a * b);
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}
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else /* Unsigned. */
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{
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@@ -2183,12 +2183,12 @@
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a = wRHALF (BITS (16, 19), i * 2);
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b = wRHALF (BITS ( 0, 3), i * 2);
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- (unsigned long) s1 = a * b;
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+ s1 = (ARMdword) (a * b);
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a = wRHALF (BITS (16, 19), i * 2 + 1);
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b = wRHALF (BITS ( 0, 3), i * 2 + 1);
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- (signed long) s2 = a * b;
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+ s2 = (ARMdword) a * b;
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}
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r |= (ARMdword) ((s1 + s2) & 0xffffffff) << (i ? 32 : 0);
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@@ -2914,9 +2914,9 @@
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case Dqual:
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if (shift > 63)
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- r = (wR [BITS (16, 19)] & 0x8000000000000000) ? 0xffffffffffffffff : 0;
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+ r = (wR [BITS (16, 19)] & 0x8000000000000000ULL) ? 0xffffffffffffffffULL : 0;
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else
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- r = ((signed long long) (wR[BITS (16, 19)] & 0xffffffffffffffff) >> shift);
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+ r = ((signed long long) (wR[BITS (16, 19)] & 0xffffffffffffffffULL) >> shift);
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SIMD64_SET (psr, NBIT64 (r), SIMD_NBIT);
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SIMD64_SET (psr, ZBIT64 (r), SIMD_ZBIT);
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break;
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@@ -2985,7 +2985,7 @@
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if (shift > 63)
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r = 0;
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else
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- r = (wR [BITS (16, 19)] & 0xffffffffffffffff) >> shift;
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+ r = (wR [BITS (16, 19)] & 0xffffffffffffffffULL) >> shift;
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SIMD64_SET (psr, NBIT64 (r), SIMD_NBIT);
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SIMD64_SET (psr, ZBIT64 (r), SIMD_ZBIT);
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@@ -3287,7 +3287,7 @@
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r = wRWORD (BITS (16, 19), 1);
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if (BIT (21) && NBIT32 (r))
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- r |= 0xffffffff00000000;
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+ r |= 0xffffffff00000000ULL;
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SIMD64_SET (psr, NBIT64 (r), SIMD_NBIT);
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SIMD64_SET (psr, ZBIT64 (r), SIMD_ZBIT);
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@@ -3354,7 +3354,7 @@
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r = wRWORD (BITS (16, 19), 0);
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if (BIT (21) && NBIT32 (r))
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- r |= 0xffffffff00000000;
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+ r |= 0xffffffff00000000ULL;
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SIMD64_SET (psr, NBIT64 (r), SIMD_NBIT);
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SIMD64_SET (psr, ZBIT64 (r), SIMD_ZBIT);
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