b050f87d13
These instructions are for 64-bit load/store. On ARMv5TE, the CPU requires addresses to be aligned to 64-bit. When misaligned, behavior is undefined (effectively either loads the same word twice on LDRD, or corrupts surrounding memory on STRD). On ARMv6 and newer, unaligned access is safe. Removing these instructions for ARMv5TE is necessary, because GCC ignores alignment information in pointers and does unsafe optimizations that have shown up as bugs in various places. Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 39638
12 lines
457 B
Diff
12 lines
457 B
Diff
--- a/gcc/config/arm/arm.h
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+++ b/gcc/config/arm/arm.h
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@@ -232,7 +232,7 @@ extern void (*arm_lang_output_object_att
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#define TARGET_BACKTRACE (leaf_function_p () \
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? TARGET_TPCS_LEAF_FRAME \
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: TARGET_TPCS_FRAME)
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-#define TARGET_LDRD (arm_arch5e && ARM_DOUBLEWORD_ALIGN)
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+#define TARGET_LDRD (arm_arch6 && ARM_DOUBLEWORD_ALIGN)
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#define TARGET_AAPCS_BASED \
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(arm_abi != ARM_ABI_APCS && arm_abi != ARM_ABI_ATPCS)
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