dcc34574ef
Reboot the oxnas target based on Linux 4.14 by rebasing our support on top of the now-existing upstream kernel support. This commit brings oxnas support to the level of v4.17 having upstream drivers for Ethernet, Serial and NAND flash. Botch up OpenWrt's local drivers for EHCI, SATA and PCIe based on the new platform code and device-tree. Re-introduce base-files from old oxnas target which works for now but needs further clean-up towards generic board support. Functional issues: * PCIe won't come up (hence no USB3 on Shuttle KD20) * I2C bus of Akitio myCloud device is likely not to work (missing debounce support in new pinctrl driver) Code-style issues: * plla/pllb needs further cleanup -- currently their users or writing into the syscon regmap after acquireling the clk instead of using defined clk_*_*() functions to setup multipliers and dividors. * PCIe phy needs its own little driver. * SATA driver is a monster and should be split into an mfd having a raidctrl regmap, sata controller, sata ports and sata phy. Tested on MitraStar STG-212 aka. Medion Akoya MD86xxx and Shuttle KD20. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
107 lines
2.7 KiB
Plaintext
107 lines
2.7 KiB
Plaintext
CONFIG_ARCH_HAS_TICK_BROADCAST=y
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# CONFIG_ARCH_MULTI_CPU_AUTO is not set
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CONFIG_ARCH_MULTI_V6=y
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CONFIG_ARCH_MULTI_V6_V7=y
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CONFIG_ARM_GIC=y
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CONFIG_ARM_HEAVY_MB=y
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CONFIG_CACHE_L2X0=y
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# CONFIG_CACHE_L2X0_PMU is not set
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CONFIG_CPU_32v6=y
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CONFIG_CPU_32v6K=y
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CONFIG_CPU_ABRT_EV6=y
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# CONFIG_CPU_BPREDICT_DISABLE is not set
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CONFIG_CPU_CACHE_V6=y
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CONFIG_CPU_CACHE_VIPT=y
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CONFIG_CPU_COPY_V6=y
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CONFIG_CPU_CP15=y
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CONFIG_CPU_CP15_MMU=y
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CONFIG_CPU_HAS_ASID=y
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# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
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# CONFIG_CPU_ICACHE_DISABLE is not set
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CONFIG_CPU_IDLE=y
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# CONFIG_CPU_IDLE_GOV_LADDER is not set
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CONFIG_CPU_IDLE_GOV_MENU=y
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CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
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CONFIG_CPU_PABRT_V6=y
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CONFIG_CPU_PM=y
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CONFIG_CPU_RMAP=y
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CONFIG_CPU_THUMB_CAPABLE=y
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CONFIG_CPU_TLB_V6=y
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CONFIG_CPU_V6K=y
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CONFIG_DCACHE_WORD_ACCESS=y
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CONFIG_DEBUG_LL=y
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CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
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CONFIG_DEBUG_LL_UART_8250=y
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# CONFIG_DEBUG_UART_8250 is not set
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# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set
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CONFIG_DEBUG_UART_8250_SHIFT=0
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CONFIG_DEBUG_UART_PHYS=0x44200000
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CONFIG_DEBUG_UART_VIRT=0xf4200000
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CONFIG_DEBUG_UNCOMPRESS=y
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CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress-ox820.h"
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CONFIG_DMA_CACHE_RWFO=y
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CONFIG_FIXED_PHY=y
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CONFIG_FORCE_MAX_ZONEORDER=12
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CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
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CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
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CONFIG_HAVE_ARM_SCU=y
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CONFIG_HAVE_ARM_TWD=y
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CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
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CONFIG_HAVE_HW_BREAKPOINT=y
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CONFIG_HAVE_SMP=y
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CONFIG_HOTPLUG_CPU=y
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CONFIG_LOCK_SPIN_ON_OWNER=y
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CONFIG_MACH_OX820=y
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CONFIG_MIGHT_HAVE_CACHE_L2X0=y
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CONFIG_MIGHT_HAVE_PCI=y
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CONFIG_MUTEX_SPIN_ON_OWNER=y
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CONFIG_NET_FLOW_LIMIT=y
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CONFIG_NR_CPUS=16
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CONFIG_OUTER_CACHE=y
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CONFIG_OUTER_CACHE_SYNC=y
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# CONFIG_PL310_ERRATA_588369 is not set
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# CONFIG_PL310_ERRATA_727915 is not set
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# CONFIG_PL310_ERRATA_753970 is not set
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# CONFIG_PL310_ERRATA_769419 is not set
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CONFIG_PM_SLEEP_SMP=y
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CONFIG_RCU_CPU_STALL_TIMEOUT=21
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# CONFIG_RCU_EXPERT is not set
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CONFIG_RCU_NEED_SEGCBLIST=y
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CONFIG_RCU_STALL_COMMON=y
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CONFIG_RFS_ACCEL=y
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CONFIG_RPS=y
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CONFIG_RWSEM_SPIN_ON_OWNER=y
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CONFIG_SMP=y
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CONFIG_SMP_ON_UP=y
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CONFIG_TREE_RCU=y
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CONFIG_TREE_SRCU=y
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CONFIG_XPS=y
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CONFIG_PCI=y
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CONFIG_PCIEAER=y
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CONFIG_PCIEPORTBUS=y
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CONFIG_PCIE_OXNAS=y
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CONFIG_PCIE_PME=y
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CONFIG_PCI_DOMAINS=y
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CONFIG_PCI_DOMAINS_GENERIC=y
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CONFIG_PCI_MSI=y
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CONFIG_PCI_MSI_IRQ_DOMAIN=y
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# CONFIG_MTD_CFI is not set
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CONFIG_MTD_CMDLINE_PARTS=y
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# CONFIG_MTD_COMPLEX_MAPPINGS is not set
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_ECC=y
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CONFIG_MTD_NAND_OXNAS=y
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CONFIG_MTD_UBI=y
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CONFIG_MTD_UBI_BEB_LIMIT=20
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CONFIG_MTD_UBI_BLOCK=y
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# CONFIG_MTD_UBI_FASTMAP is not set
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# CONFIG_MTD_UBI_GLUEBI is not set
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_UBIFS_FS=y
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# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
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CONFIG_UBIFS_FS_LZO=y
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CONFIG_UBIFS_FS_SECURITY=y
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CONFIG_UBIFS_FS_ZLIB=y
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CONFIG_ARCH_WANT_LIBATA_LEDS=y
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CONFIG_ATA_LEDS=y
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