Openwrt/target/linux/ath79/dts/qca9563_tplink_archer-c2-v3.dts
Adrian Schmutzler 3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00

175 lines
2.8 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca956x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "tplink,archer-c2-v3", "qca,qca9563";
model = "TP-Link Archer C2 v3";
aliases {
led-boot = &led_system;
led-failsafe = &led_system;
led-running = &led_system;
led-upgrade = &led_system;
};
leds {
compatible = "gpio-leds";
led_system: system {
label = "green:system";
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
default-state = "on";
};
wifi2g {
label = "green:wifi2g";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
wifi5g {
label = "green:wifi5g";
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wifi_wps {
label = "green:wps";
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
};
wan {
label = "green:wan";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
wan_fail {
label = "orange:wan";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
lan1 {
label = "green:lan1";
gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
};
lan2 {
label = "green:lan2";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
lan3 {
label = "green:lan3";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
};
lan4 {
label = "green:lan4";
gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
wps {
label = "WPS button";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "factory-uboot";
reg = <0x000000 0x020000>;
read-only;
};
partition@20000 {
label = "uboot";
reg = <0x020000 0x10000>;
read-only;
};
partition@30000 {
label = "firmware";
reg = <0x030000 0x7A0000>;
compatible = "denx,uimage";
};
info: partition@7e0000 {
label = "info";
reg = <0x7e0000 0x010000>;
read-only;
};
art: partition@7f0000 {
label = "art";
reg = <0x7f0000 0x010000>;
read-only;
};
};
};
};
&mdio0 {
status = "okay";
phy-mask = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "sgmii";
qca,mib-poll-interval = <500>;
qca,ar8327-initvals = <
0x04 0x00080080 /* PORT0 PAD MODE CTRL */
0x7c 0x0000007e /* PORT0_STATUS */
>;
};
};
&pcie {
status = "okay";
};
&eth0 {
status = "okay";
mtd-mac-address = <&info 0x8>;
phy-mode = "sgmii";
phy-handle = <&phy0>;
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&info 0x8>;
};