Openwrt/target/linux/ath79/dts/ar9344_teltonika_rut9xx.dtsi
Adrian Schmutzler 3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar9344.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "teltonika,rut9xx", "qca,ar9344";
aliases {
serial1 = &hs_uart;
label-mac-device = &eth1;
};
i2c0: i2c {
compatible = "i2c-gpio";
scl-gpios = <&gpio 16 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio 17 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
#address-cells = <1>;
#size-cells = <0>;
hwmon@4d {
compatible = "microchip,mcp3221";
reg = <0x4d>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&ref {
clock-frequency = <40000000>;
};
&hs_uart {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pmx_uart2>;
rts-gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
rs485-rts-active-low;
linux,rs485-enabled-at-boot-time;
};
&spi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pmx_spi>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x20000>;
read-only;
};
config: partition@20000 {
label = "config";
reg = <0x20000 0x10000>;
read-only;
};
art: partition@30000 {
label = "art";
reg = <0x30000 0x10000>;
read-only;
};
partition@40000 {
label = "firmware";
reg = <0x40000 0xf30000>;
compatible = "tplink,firmware";
};
partition@f70000 {
label = "event-log";
reg = <0xf70000 0x90000>;
read-only;
};
};
};
microsd@1 {
status = "disabled";
compatible = "mmc-spi-slot";
spi-max-frequency = <25000000>;
reg = <1>;
voltage-ranges = <3200 3400>;
broken-cd;
};
};
&usb {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
port@1 {
compatible = "usb-a-connector";
reg = <1>;
};
port@3 {
label = "RS-232 serial adapter";
reg = <3>;
};
port@4 {
label = "internal wwan modem";
reg = <4>;
};
};
};
&usb_phy {
status = "okay";
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&config 0x0>;
mtd-mac-address-increment = <2>;
};
&pinmux {
pmx_spi: spi {
// SPI_CS1 on GPIO 3
pinctrl-single,bits = <0x0 0x07000000 0xff000000>;
};
pmx_leds_switch: leds_switch {
// switch port LEDs on GPIO 1, GPIO 13, GPIO 14 and GPIO 22
pinctrl-single,bits = <0x0 0x00002d00 0x0000ff00>,
<0xc 0x002c2b00 0x00ffff00>,
<0x14 0x002a0000 0x00ff0000>;
};
pmx_uart2: uart2 {
// UART1_DTR on GPIO 0, UART1_RD on GPIO 11, UART1_TD on GPIO 18
pinctrl-single,bits = <0x0 0x0 0xff>,
<0x10 0x4f000000 0xff000000>,
<0x3c 0x000b0000 0x00ff0000>;
};
};