Felix Fietkau bc4f2c5ce4 ar71xx: fix ar724x clock calculation ... According to the AR7242 datasheet section 2.8, AR724X CPUs use a 40MHz input clock as the REF_CLK instead of 5MHz. The correct CPU PLL calculation procedure is as follows: CPU_PLL = (DIV * REF_CLK) / REF_DIV / 2. This patch is compatible with the current calculation procedure with default DIV and REF_DIV values. Test on both AR7240, AR7241 and AR7242. Signed-off-by: Weijie Gao <hackpascal@gmail.com> SVN-Revision: 46856		2015-09-11 16:32:45 +00:00
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adm5120
adm8668
ar7
ar71xx	ar71xx: fix ar724x clock calculation	2015-09-11 16:32:45 +00:00
arm64
at91
ath25
au1000
bcm53xx
brcm47xx
brcm63xx
brcm2708	brcm2708: add kmod-sound-soc-raspidac3	2015-09-11 16:32:15 +00:00
cns3xxx
gemini
generic	generic: Fix per interface nf_call_iptables setting	2015-09-09 18:40:15 +00:00
imx6
ipq806x	ipq806x: fix uninitialized variable usage in cpufreq-krait	2015-09-10 10:09:42 +00:00
ixp4xx
kirkwood
lantiq
malta
mcs814x
mpc85xx
mvebu
mxs
netlogic
octeon
omap	kernel: remove packaging of kmod-crypto-core and kmod-crypto-arc4	2015-09-08 12:31:04 +00:00
omap24xx
orion	kernel: remove packaging of kmod-crypto-core and kmod-crypto-arc4	2015-09-08 12:31:04 +00:00
oxnas
ppc40x
ppc44x
pxa
ramips
rb532
realview
sunxi	kernel: remove packaging of kmod-crypto-core and kmod-crypto-arc4	2015-09-08 12:31:04 +00:00
uml
x86
xburst
Makefile