477 lines
13 KiB
Diff
477 lines
13 KiB
Diff
From 8c19ced548538d964dcfb83bdf9ea9e8fbb7bdb1 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Wed, 13 Mar 2013 10:02:58 +0100
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Subject: [PATCH 10/34] MIPS: lantiq: wifi and ethernet eeprom handling
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h | 6 +
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.../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 3 +
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arch/mips/lantiq/xway/Makefile | 2 +
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arch/mips/lantiq/xway/ath_eep.c | 237 ++++++++++++++++++++
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arch/mips/lantiq/xway/pci-ath-fixup.c | 109 +++++++++
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arch/mips/lantiq/xway/rt_eep.c | 60 +++++
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6 files changed, 417 insertions(+)
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create mode 100644 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
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create mode 100644 arch/mips/lantiq/xway/ath_eep.c
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create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c
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create mode 100644 arch/mips/lantiq/xway/rt_eep.c
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--- /dev/null
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+++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
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@@ -0,0 +1,6 @@
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+#ifndef _PCI_ATH_FIXUP
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+#define _PCI_ATH_FIXUP
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+
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+void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
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+
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+#endif /* _PCI_ATH_FIXUP */
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--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
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+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
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@@ -90,5 +90,8 @@ int xrx200_gphy_boot(struct device *dev,
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extern void ltq_pmu_enable(unsigned int module);
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extern void ltq_pmu_disable(unsigned int module);
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+/* allow the ethernet driver to load a flash mapped mac addr */
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+const u8* ltq_get_eth_mac(void);
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+
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#endif /* CONFIG_SOC_TYPE_XWAY */
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#endif /* _LTQ_XWAY_H__ */
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--- a/arch/mips/lantiq/xway/Makefile
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+++ b/arch/mips/lantiq/xway/Makefile
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@@ -2,4 +2,6 @@ obj-y := prom.o sysctrl.o clk.o reset.o
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obj-y += vmmc.o
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+obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
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+
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obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
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--- /dev/null
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+++ b/arch/mips/lantiq/xway/ath_eep.c
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@@ -0,0 +1,250 @@
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+/*
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+ * Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
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+ * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
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+ * Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
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+ * Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
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+ * Copyright (C) 2013 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ */
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+
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+#include <linux/init.h>
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+#include <linux/module.h>
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+#include <linux/platform_device.h>
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+#include <linux/etherdevice.h>
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+#include <linux/ath5k_platform.h>
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+#include <linux/ath9k_platform.h>
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+#include <linux/pci.h>
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+#include <linux/err.h>
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+#include <linux/mtd/mtd.h>
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+#include <pci-ath-fixup.h>
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+#include <lantiq_soc.h>
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+#include <linux/of_net.h>
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+
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+extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
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+struct ath5k_platform_data ath5k_pdata;
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+struct ath9k_platform_data ath9k_pdata = {
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+ .led_pin = -1,
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+};
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+static u8 athxk_eeprom_mac[6];
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+
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+static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
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+{
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+ dev->dev.platform_data = &ath9k_pdata;
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+ return 0;
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+}
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+
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+int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
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+{
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+ struct device_node *np = pdev->dev.of_node, *mtd_np;
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+ int mac_offset;
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+ u32 mac_inc = 0, pci_slot = 0;
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+ int i;
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+ struct mtd_info *the_mtd;
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+ size_t flash_readlen;
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+ const __be32 *list;
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+ const char *part;
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+ phandle phandle;
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+
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+ list = of_get_property(np, "ath,eep-flash", &i);
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+ if (!list || (i != (2 * sizeof(*list)))) {
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+ dev_err(&pdev->dev, "failed to find ath,eep-flash\n");
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+ return -ENODEV;
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+ }
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+
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+ phandle = be32_to_cpup(list++);
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+ if (!phandle) {
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+ dev_err(&pdev->dev, "failed to find phandle\n");
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+ return -ENODEV;
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+ }
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+
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+ mtd_np = of_find_node_by_phandle(phandle);
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+ if (!mtd_np) {
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+ dev_err(&pdev->dev, "failed to find mtd node\n");
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+ return -ENODEV;
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+ }
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+
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+ part = of_get_property(mtd_np, "label", NULL);
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+ if (!part)
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+ part = mtd_np->name;
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+
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+ the_mtd = get_mtd_device_nm(part);
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+ if (the_mtd == ERR_PTR(-ENODEV)) {
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+ dev_err(&pdev->dev, "failed to find mtd device\n");
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+ return -ENODEV;
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+ }
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+
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+ i = mtd_read(the_mtd, be32_to_cpup(list),
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+ ATH9K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
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+ (void *) ath9k_pdata.eeprom_data);
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+ put_mtd_device(the_mtd);
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+ if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
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+ dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
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+ return -ENODEV;
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+ }
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+
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+ if (of_find_property(np, "ath,eep-swap", NULL))
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+ for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
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+ ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
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+
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+ if (of_find_property(np, "ath,eep-endian", NULL)) {
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+ ath9k_pdata.endian_check = true;
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+
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+ dev_info(&pdev->dev, "endian check enabled.\n");
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+ }
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+
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+ if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
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+ memcpy_fromio(athxk_eeprom_mac, (void*) ath9k_pdata.eeprom_data + mac_offset, 6);
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+ } else {
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+ random_ether_addr(athxk_eeprom_mac);
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+ if (of_get_mac_address_mtd(np, athxk_eeprom_mac))
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+ dev_warn(&pdev->dev, "using random mac\n");
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+ }
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+
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+ if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
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+ athxk_eeprom_mac[5] += mac_inc;
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+
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+ ath9k_pdata.macaddr = athxk_eeprom_mac;
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+ ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
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+
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+ if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
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+ ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
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+ dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
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+ }
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+
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+ dev_info(&pdev->dev, "loaded ath9k eeprom\n");
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+
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+ return 0;
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+}
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+
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+static struct of_device_id ath9k_eeprom_ids[] = {
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+ { .compatible = "ath9k,eeprom" },
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+ { }
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+};
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+
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+static struct platform_driver ath9k_eeprom_driver = {
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+ .driver = {
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+ .name = "ath9k,eeprom",
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+ .owner = THIS_MODULE,
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+ .of_match_table = of_match_ptr(ath9k_eeprom_ids),
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+ },
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+};
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+
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+static int ath9k_eep_loaded;
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+static int __init of_ath9k_eeprom_init(void)
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+{
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+ int ret = platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
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+
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+ if (!ret)
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+ ath9k_eep_loaded = 1;
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+
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+ return ret;
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+}
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+
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+static int __init of_ath9k_eeprom_init_late(void)
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+{
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+ if (ath9k_eep_loaded)
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+ return 0;
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+ return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
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+}
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+late_initcall(of_ath9k_eeprom_init_late);
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+subsys_initcall(of_ath9k_eeprom_init);
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+
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+static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
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+{
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+ dev->dev.platform_data = &ath5k_pdata;
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+ return 0;
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+}
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+
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+int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
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+{
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+ struct device_node *np = pdev->dev.of_node, *mtd_np;
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+ int mac_offset;
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+ u32 mac_inc = 0;
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+ int i;
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+ struct mtd_info *the_mtd;
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+ size_t flash_readlen;
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+ const __be32 *list;
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+ const char *part;
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+ phandle phandle;
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+
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+ list = of_get_property(np, "ath,eep-flash", &i);
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+ if (!list || (i != (2 * sizeof(*list)))) {
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+ dev_err(&pdev->dev, "failed to find ath,eep-flash\n");
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+ return -ENODEV;
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+ }
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+
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+ phandle = be32_to_cpup(list++);
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+ if (!phandle) {
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+ dev_err(&pdev->dev, "failed to find phandle\n");
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+ return -ENODEV;
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+ }
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+
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+ mtd_np = of_find_node_by_phandle(phandle);
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+ if (!mtd_np) {
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+ dev_err(&pdev->dev, "failed to find mtd node\n");
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+ return -ENODEV;
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+ }
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+
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+ part = of_get_property(mtd_np, "label", NULL);
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+ if (!part)
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+ part = mtd_np->name;
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+
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+ the_mtd = get_mtd_device_nm(part);
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+ if (the_mtd == ERR_PTR(-ENODEV)) {
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+ dev_err(&pdev->dev, "failed to find mtd device\n");
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+ return -ENODEV;
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+ }
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+
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+ i = mtd_read(the_mtd, be32_to_cpup(list),
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+ ATH5K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
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+ (void *) ath5k_pdata.eeprom_data);
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+ put_mtd_device(the_mtd);
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+ if ((sizeof(ath5k_pdata.eeprom_data) != flash_readlen) || i) {
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+ dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
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+ return -ENODEV;
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+ }
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+
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+ if (of_find_property(np, "ath,eep-swap", NULL))
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+ for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
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+ ath5k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
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+
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+ if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
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+ memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_pdata.eeprom_data + mac_offset, 6);
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+ } else {
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+ random_ether_addr(athxk_eeprom_mac);
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+ if (of_get_mac_address_mtd(np, athxk_eeprom_mac))
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+ dev_warn(&pdev->dev, "using random mac\n");
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+ }
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+
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+ if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
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+ athxk_eeprom_mac[5] += mac_inc;
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+
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+ ath5k_pdata.macaddr = athxk_eeprom_mac;
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+ ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
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+
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+ dev_info(&pdev->dev, "loaded ath5k eeprom\n");
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+
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+ return 0;
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+}
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+
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+static struct of_device_id ath5k_eeprom_ids[] = {
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+ { .compatible = "ath5k,eeprom" },
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+ { }
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+};
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+
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+static struct platform_driver ath5k_eeprom_driver = {
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+ .driver = {
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+ .name = "ath5k,eeprom",
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+ .owner = THIS_MODULE,
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+ .of_match_table = of_match_ptr(ath5k_eeprom_ids),
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+ },
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+};
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+
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+static int __init of_ath5k_eeprom_init(void)
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+{
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+ return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
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+}
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+device_initcall(of_ath5k_eeprom_init);
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--- /dev/null
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+++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
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@@ -0,0 +1,109 @@
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+/*
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+ * Atheros AP94 reference board PCI initialization
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+ *
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+ * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ */
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+
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+#include <linux/pci.h>
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+#include <linux/init.h>
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+#include <linux/delay.h>
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+#include <lantiq_soc.h>
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+
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+#define LTQ_PCI_MEM_BASE 0x18000000
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+
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+struct ath_fixup {
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+ u16 *cal_data;
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+ unsigned slot;
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+};
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+
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+static int ath_num_fixups;
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+static struct ath_fixup ath_fixups[2];
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+
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+static void ath_pci_fixup(struct pci_dev *dev)
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+{
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+ void __iomem *mem;
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+ u16 *cal_data = NULL;
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+ u16 cmd;
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+ u32 bar0;
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+ u32 val;
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+ unsigned i;
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+
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+ for (i = 0; i < ath_num_fixups; i++) {
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+ if (ath_fixups[i].cal_data == NULL)
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+ continue;
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+
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+ if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
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+ continue;
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+
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+ cal_data = ath_fixups[i].cal_data;
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+ break;
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+ }
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+
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+ if (cal_data == NULL)
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+ return;
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+
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+ if (*cal_data != 0xa55a) {
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+ pr_err("pci %s: invalid calibration data\n", pci_name(dev));
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+ return;
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+ }
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+
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+ pr_info("pci %s: fixup device configuration\n", pci_name(dev));
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+
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+ mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
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+ if (!mem) {
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+ pr_err("pci %s: ioremap error\n", pci_name(dev));
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+ return;
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+ }
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+
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+ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
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+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
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+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
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+ cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
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+ pci_write_config_word(dev, PCI_COMMAND, cmd);
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+
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+ /* set pointer to first reg address */
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+ cal_data += 3;
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+ while (*cal_data != 0xffff) {
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+ u32 reg;
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+ reg = *cal_data++;
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+ val = *cal_data++;
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+ val |= (*cal_data++) << 16;
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+
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+ ltq_w32(swab32(val), mem + reg);
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+ udelay(100);
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+ }
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+
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+ pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
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+ dev->vendor = val & 0xffff;
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+ dev->device = (val >> 16) & 0xffff;
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+
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+ pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
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+ dev->revision = val & 0xff;
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+ dev->class = val >> 8; /* upper 3 bytes */
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+
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+ pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
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+ pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
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+
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+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
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+ cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
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+ pci_write_config_word(dev, PCI_COMMAND, cmd);
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+
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+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
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+
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+ iounmap(mem);
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+}
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+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
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+
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+void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
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+{
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+ if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
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+ return;
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+
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+ ath_fixups[ath_num_fixups].slot = slot;
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+ ath_fixups[ath_num_fixups].cal_data = cal_data;
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+ ath_num_fixups++;
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+}
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--- /dev/null
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+++ b/arch/mips/lantiq/xway/rt_eep.c
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@@ -0,0 +1,60 @@
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+/*
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+ * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ */
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+
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+#include <linux/init.h>
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+#include <linux/module.h>
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+#include <linux/pci.h>
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+#include <linux/platform_device.h>
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+#include <linux/rt2x00_platform.h>
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+
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+extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
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+static struct rt2x00_platform_data rt2x00_pdata;
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+
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+static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
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+{
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+ dev->dev.platform_data = &rt2x00_pdata;
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+ return 0;
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+}
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+
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+int __init of_ralink_eeprom_probe(struct platform_device *pdev)
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+{
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+ struct device_node *np = pdev->dev.of_node;
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+ const char *eeprom;
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+
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+ if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
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+ dev_err(&pdev->dev, "failed to load eeprom filename\n");
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+ return 0;
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+ }
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+
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+ rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
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+// rt2x00_pdata.mac_address = mac;
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+ ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
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+
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+ dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
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+
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+ return 0;
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+}
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+
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+static struct of_device_id ralink_eeprom_ids[] = {
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+ { .compatible = "ralink,eeprom" },
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+ { }
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+};
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+
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+static struct platform_driver ralink_eeprom_driver = {
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+ .driver = {
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+ .name = "ralink,eeprom",
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+ .owner = THIS_MODULE,
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+ .of_match_table = of_match_ptr(ralink_eeprom_ids),
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+ },
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+};
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+
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+static int __init of_ralink_eeprom_init(void)
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+{
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+ return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
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+}
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+device_initcall(of_ralink_eeprom_init);
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