Openwrt/target/linux/ath79/dts/qca9563_glinet_gl-ar750s.dtsi
Chuanhong Guo ebf0d8dade ath79: add new ar934x spi driver
A new shift mode was introduced since ar934x which has a way better
performance than current bitbang driver and can handle higher spi
clock properly. This commit adds a new driver to make use of this
new feature.
This new driver has chipselect properly configured and we don't need
cs-gpios hack in dts anymore. Remove them.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2020-02-06 22:53:03 +08:00

201 lines
3.2 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca956x.dtsi"
/ {
compatible = "glinet,gl-ar750s", "qca,qca9563";
model = "GL.iNet GL-AR750S";
chosen {
bootargs = "console=ttyS0,115200n8";
};
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
label-mac-device = &eth0;
};
keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&jtag_disable_pins>;
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
};
mode {
label = "mode";
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_power: power {
label = "gl-ar750s:green:power";
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
default-state = "keep";
};
led_wlan2g: wlan2g {
label = "gl-ar750s:green:wlan2g";
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
led_wlan5g: wlan5g {
label = "gl-ar750s:green:wlan5g";
gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tpt";
};
};
i2c: i2c {
compatible = "i2c-gpio";
sda-gpios = <&gpio 5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio 21 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
};
};
&spi {
status = "okay";
num-cs = <2>;
flash_nor: flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
nor_partitions: partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
};
art: partition@50000 {
label = "art";
reg = <0x050000 0x010000>;
read-only;
};
nor_firmware: partition@60000 {
label = "nor_firmware";
reg = <0x060000 0xfa0000>;
};
nor_kernel: partition_alt@60000 {
label = "nor_kernel";
reg = <0x060000 0x400000>;
};
nor_reserved: parition_alt@460000 {
label = "nor_reserved";
reg = <0x460000 0xba0000>;
};
};
};
flash_nand: flash@1 {
compatible = "spi-nand";
reg = <1>;
spi-max-frequency = <25000000>;
nand_partitions: partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
nand_ubi: partition@0 {
label = "nand_ubi";
reg = <0x000000 0x8000000>;
};
};
};
};
&eth0 {
status = "okay";
phy-handle = <&phy0>;
mtd-mac-address = <&art 0x0>;
};
&gpio {
usb_vbus {
gpio-hog;
gpios = <7 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "usb-vbus";
};
};
&mdio0 {
status = "okay";
phy-mask = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "sgmii";
qca,ar8327-initvals = <
0x04 0x00080080 /* PORT0 PAD MODE CTRL */
0x7c 0x0000007e /* PORT0_STATUS */
>;
};
};
&pcie {
status = "okay";
};
&uart {
status = "okay";
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};
&usb_phy0 {
status = "okay";
};
&usb_phy1 {
status = "okay";
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
};