9100566267
Manually rebased patches: ath79/patches-5.4/910-unaligned_access_hacks.patch bcm27xx/patches-5.4/950-0135-spi-spi-bcm2835-Disable-forced-software-CS.patch bcm27xx/patches-5.4/950-0414-SQUASH-Fix-spi-driver-compiler-warnings.patch ipq806x/patches-5.4/093-4-v5.8-ipq806x-PCI-qcom-Use-bulk-clk-api-and-assert-on-error.patch Removed since could be reverse-applied by quilt and found to be included upstream: ipq806x/patches-5.4/096-PCI-qcom-Make-sure-PCIe-is-reset-before-init-for-rev.patch All modifications made by update_kernel.sh Build system: x86_64 Build-tested: ipq806x/R7800, ath79/generic, bcm27xx/bcm2711 Run-tested: ipq806x/R7800 No dmesg regressions, everything functional Signed-off-by: John Audia <graysky@archlinux.us> [refresh altered targets after rebase] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
88 lines
3.1 KiB
Diff
88 lines
3.1 KiB
Diff
From 7a291e75b7793f1fbd0ad9ad39ae35a2b091d84b Mon Sep 17 00:00:00 2001
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From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
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Date: Tue, 26 Jul 2016 16:12:30 +0300
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Subject: [PATCH] arm/arm64 KVM: allow specifying s2 prot bits when mapping i/o
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Add parameter allowing to specify s2 page table
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protection and type bits and update the callers
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accordingly.
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The parameter will be used in a forthcoming patch.
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Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
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---
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arch/arm/include/asm/kvm_mmu.h | 3 ++-
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arch/arm64/include/asm/kvm_mmu.h | 3 ++-
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virt/kvm/arm/mmu.c | 8 +++++---
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virt/kvm/arm/vgic/vgic-v2.c | 3 ++-
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4 files changed, 11 insertions(+), 6 deletions(-)
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--- a/arch/arm/include/asm/kvm_mmu.h
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+++ b/arch/arm/include/asm/kvm_mmu.h
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@@ -55,7 +55,8 @@ void stage2_unmap_vm(struct kvm *kvm);
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int kvm_alloc_stage2_pgd(struct kvm *kvm);
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void kvm_free_stage2_pgd(struct kvm *kvm);
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int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
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- phys_addr_t pa, unsigned long size, bool writable);
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+ phys_addr_t pa, unsigned long size, bool writable,
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+ pgprot_t prot);
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int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run);
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--- a/arch/arm64/include/asm/kvm_mmu.h
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+++ b/arch/arm64/include/asm/kvm_mmu.h
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@@ -156,7 +156,8 @@ void stage2_unmap_vm(struct kvm *kvm);
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int kvm_alloc_stage2_pgd(struct kvm *kvm);
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void kvm_free_stage2_pgd(struct kvm *kvm);
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int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
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- phys_addr_t pa, unsigned long size, bool writable);
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+ phys_addr_t pa, unsigned long size, bool writable,
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+ pgprot_t prot);
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int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run);
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--- a/virt/kvm/arm/mmu.c
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+++ b/virt/kvm/arm/mmu.c
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@@ -1341,9 +1341,11 @@ static int stage2_pudp_test_and_clear_yo
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* @guest_ipa: The IPA at which to insert the mapping
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* @pa: The physical address of the device
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* @size: The size of the mapping
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+ * @prot: S2 page translation bits
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*/
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int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
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- phys_addr_t pa, unsigned long size, bool writable)
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+ phys_addr_t pa, unsigned long size, bool writable,
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+ pgprot_t prot)
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{
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phys_addr_t addr, end;
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int ret = 0;
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@@ -1354,7 +1356,7 @@ int kvm_phys_addr_ioremap(struct kvm *kv
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pfn = __phys_to_pfn(pa);
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for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) {
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- pte_t pte = kvm_pfn_pte(pfn, PAGE_S2_DEVICE);
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+ pte_t pte = kvm_pfn_pte(pfn, prot);
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if (writable)
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pte = kvm_s2pte_mkwrite(pte);
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@@ -2362,7 +2364,7 @@ int kvm_arch_prepare_memory_region(struc
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ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
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vm_end - vm_start,
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- writable);
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+ writable, PAGE_S2_DEVICE);
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if (ret)
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break;
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}
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--- a/virt/kvm/arm/vgic/vgic-v2.c
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+++ b/virt/kvm/arm/vgic/vgic-v2.c
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@@ -341,7 +341,8 @@ int vgic_v2_map_resources(struct kvm *kv
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if (!static_branch_unlikely(&vgic_v2_cpuif_trap)) {
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ret = kvm_phys_addr_ioremap(kvm, dist->vgic_cpu_base,
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kvm_vgic_global_state.vcpu_base,
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- KVM_VGIC_V2_CPU_SIZE, true);
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+ KVM_VGIC_V2_CPU_SIZE, true,
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+ PAGE_S2_DEVICE);
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if (ret) {
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kvm_err("Unable to remap VGIC CPU to VCPU\n");
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goto out;
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