3af779eb17
This is a backport of the patches accepted to the Linux mainline related to mvebu SoC (Armada XP and Armada 370) between Linux v3.11, and Linux v3.12. This work mainly covers: * Ground work for sharing the pxa nand driver(drivers/mtd/nand/pxa3xx_nand.c) between the PXA family,and the Armada family. * Further updates to the mvebu MBus. * Work and ground work for enabling MSI on the Armada family. * some phy / mdio bus initialization related work. * Device tree binding documentation update. Signed-off-by: Seif Mazareeb <seif.mazareeb@gmail.com> CC: Luka Perkov <luka@openwrt.org> SVN-Revision: 39565
44 lines
2.1 KiB
Diff
44 lines
2.1 KiB
Diff
From 67f66e13d8a6da710d6df965021d92261083b584 Mon Sep 17 00:00:00 2001
|
|
From: Gregory CLEMENT <gregory.clement@free-electrons.com>
|
|
Date: Wed, 25 Sep 2013 13:24:18 +0200
|
|
Subject: [PATCH 089/203] ARM: mvebu: fix gated clock documentation
|
|
|
|
The gated clock documentation referred only to the Orion SoC whereas
|
|
it also applied for the Armada 370/XP SoC. This commit updates the
|
|
introduction text and also the list of the compatible strings.
|
|
|
|
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
|
|
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
|
---
|
|
.../devicetree/bindings/clock/mvebu-gated-clock.txt | 14 ++++++++------
|
|
1 file changed, 8 insertions(+), 6 deletions(-)
|
|
|
|
--- a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt
|
|
+++ b/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt
|
|
@@ -1,10 +1,10 @@
|
|
-* Gated Clock bindings for Marvell Orion SoCs
|
|
+* Gated Clock bindings for Marvell EBU SoCs
|
|
|
|
-Marvell Dove and Kirkwood allow some peripheral clocks to be gated to save
|
|
-some power. The clock consumer should specify the desired clock by having
|
|
-the clock ID in its "clocks" phandle cell. The clock ID is directly mapped to
|
|
-the corresponding clock gating control bit in HW to ease manual clock lookup
|
|
-in datasheet.
|
|
+Marvell Armada 370/XP, Dove and Kirkwood allow some peripheral clocks to be
|
|
+gated to save some power. The clock consumer should specify the desired clock
|
|
+by having the clock ID in its "clocks" phandle cell. The clock ID is directly
|
|
+mapped to the corresponding clock gating control bit in HW to ease manual clock
|
|
+lookup in datasheet.
|
|
|
|
The following is a list of provided IDs for Armada 370:
|
|
ID Clock Peripheral
|
|
@@ -94,6 +94,8 @@ ID Clock Peripheral
|
|
|
|
Required properties:
|
|
- compatible : shall be one of the following:
|
|
+ "marvell,armada-370-gating-clock" - for Armada 370 SoC clock gating
|
|
+ "marvell,armada-xp-gating-clock" - for Armada XP SoC clock gating
|
|
"marvell,dove-gating-clock" - for Dove SoC clock gating
|
|
"marvell,kirkwood-gating-clock" - for Kirkwood SoC clock gating
|
|
- reg : shall be the register address of the Clock Gating Control register
|