161 lines
4.1 KiB
Diff
161 lines
4.1 KiB
Diff
MIPS: allow disabling the kernel FPU emulator
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This patch allows turning off the in-kernel Algorithmics
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FPU emulator support, which allows one to save a couple of
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precious blocks on an embedded system.
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Signed-off-by: Florian Fainelli <florian@openwrt.org>
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--
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--- a/arch/mips/Kconfig
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+++ b/arch/mips/Kconfig
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@@ -934,6 +934,17 @@ config I8259
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config MIPS_BONITO64
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bool
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+config MIPS_FPU_EMU
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+ bool "Enable FPU emulation"
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+ default y
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+ help
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+ This option allows building a kernel with or without the Algorithmics
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+ FPU emulator enabled. Turning off this option results in a kernel which
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+ does not catch floating operations exceptions. Make sure that your toolchain
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+ is configured to enable software floating point emulation in that case.
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+
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+ If unsure say Y here.
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+
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config MIPS_MSC
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bool
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--- a/arch/mips/math-emu/Makefile
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+++ b/arch/mips/math-emu/Makefile
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@@ -2,10 +2,12 @@
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# Makefile for the Linux/MIPS kernel FPU emulation.
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#
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-obj-y := cp1emu.o ieee754m.o ieee754d.o ieee754dp.o ieee754sp.o ieee754.o \
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+obj-y := kernel_linkage.o
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+
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+obj-$(CONFIG_MIPS_FPU_EMU) += ieee754m.o ieee754d.o ieee754dp.o ieee754sp.o ieee754.o \
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ieee754xcpt.o dp_frexp.o dp_modf.o dp_div.o dp_mul.o dp_sub.o \
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dp_add.o dp_fsp.o dp_cmp.o dp_logb.o dp_scalb.o dp_simple.o \
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dp_tint.o dp_fint.o dp_tlong.o dp_flong.o sp_frexp.o sp_modf.o \
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sp_div.o sp_mul.o sp_sub.o sp_add.o sp_fdp.o sp_cmp.o sp_logb.o \
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sp_scalb.o sp_simple.o sp_tint.o sp_fint.o sp_tlong.o sp_flong.o \
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- dp_sqrt.o sp_sqrt.o kernel_linkage.o dsemul.o
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+ dp_sqrt.o sp_sqrt.o dsemul.o cp1emu.o
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--- a/arch/mips/math-emu/kernel_linkage.c
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+++ b/arch/mips/math-emu/kernel_linkage.c
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@@ -29,6 +29,7 @@
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#define SIGNALLING_NAN 0x7ff800007ff80000LL
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+#ifdef CONFIG_MIPS_FPU_EMU
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void fpu_emulator_init_fpu(void)
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{
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static int first = 1;
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@@ -115,3 +116,36 @@ int fpu_emulator_restore_context32(struc
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return err;
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}
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#endif
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+
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+#else
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+
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+void fpu_emulator_init_fpu(void)
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+{
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+ printk(KERN_INFO "FPU emulator disabled, make sure your toolchain"
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+ "was compiled with software floating point support (soft-float)\n");
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+ return;
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+}
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+
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+int fpu_emulator_save_context(struct sigcontext __user *sc)
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+{
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+ return 0;
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+}
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+
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+int fpu_emulator_restore_context(struct sigcontext __user *sc)
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+{
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+ return 0;
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+}
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+
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+#ifdef CONFIG_64BIT
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+int fpu_emulator_save_context32(struct sigcontext32 __user *sc)
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+{
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+ return 0;
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+}
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+
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+int fpu_emulator_restore_context32(struct sigcontext32 __user *sc)
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+{
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+ return 0;
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+}
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+#endif /* CONFIG_64BIT */
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+
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+#endif /* CONFIG_MIPS_FPU_EMU */
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--- a/arch/mips/include/asm/fpu_emulator.h
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+++ b/arch/mips/include/asm/fpu_emulator.h
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@@ -27,6 +27,8 @@
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#include <asm/inst.h>
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#include <asm/local.h>
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+#ifdef CONFIG_MIPS_FPU_EMU
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+
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#ifdef CONFIG_DEBUG_FS
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struct mips_fpu_emulator_stats {
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@@ -60,6 +62,38 @@ extern int fpu_emulator_cop1Handler(stru
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int process_fpemu_return(int sig, void __user *fault_addr);
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int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
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unsigned long *contpc);
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+#else
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+static inline int mips_dsemul(struct pt_regs *regs, mips_instruction ir,
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+ unsigned long cpc)
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+{
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+ return 0;
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+}
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+
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+static inline int do_dsemulret(struct pt_regs *xcp)
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+{
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+ return 0;
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+}
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+
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+static inline int fpu_emulator_cop1Handler(struct pt_regs *xcp,
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+ struct mips_fpu_struct *ctx,
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+ int has_fpu,
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+ void *__user *fault_addr)
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+{
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+ return 0;
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+}
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+
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+static inline int process_fpemu_return(int sig, void __user *fault_addr)
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+{
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+ return -EINVAL;
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+}
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+
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+static inline int mm_isBranchInstr(struct pt_regs *regs,
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+ struct mm_decoded_insn dec_insn,
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+ unsigned long *contpc)
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+{
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+ return 0;
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+}
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+#endif /* CONFIG_MIPS_FPU_EMU */
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/*
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* Instruction inserted following the badinst to further tag the sequence
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--- a/arch/mips/kernel/traps.c
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+++ b/arch/mips/kernel/traps.c
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@@ -701,6 +701,7 @@ asmlinkage void do_ov(struct pt_regs *re
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exception_exit(prev_state);
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}
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+#ifdef CONFIG_MIPS_FPU_EMU
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int process_fpemu_return(int sig, void __user *fault_addr)
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{
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if (sig == SIGSEGV || sig == SIGBUS) {
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@@ -724,6 +725,7 @@ int process_fpemu_return(int sig, void _
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return 0;
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}
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}
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+#endif /* CONFIG_MIPS_FPU_EMU */
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/*
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* XXX Delayed fp exceptions when doing a lazy ctx switch XXX
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