Felix Fietkau bc4f2c5ce4 ar71xx: fix ar724x clock calculation ... According to the AR7242 datasheet section 2.8, AR724X CPUs use a 40MHz input clock as the REF_CLK instead of 5MHz. The correct CPU PLL calculation procedure is as follows: CPU_PLL = (DIV * REF_CLK) / REF_DIV / 2. This patch is compatible with the current calculation procedure with default DIV and REF_DIV values. Test on both AR7240, AR7241 and AR7242. Signed-off-by: Weijie Gao <hackpascal@gmail.com> SVN-Revision: 46856		2015-09-11 16:32:45 +00:00
..
base-files	target: ar71xx: add support for COMFAST CF-E316N v2 board	2015-09-11 16:31:35 +00:00
files	target: ar71xx: add support for COMFAST CF-E316N v2 board	2015-09-11 16:31:35 +00:00
generic	target: ar71xx: add support for COMFAST CF-E316N v2 board	2015-09-11 16:31:35 +00:00
image	target: ar71xx: add support for COMFAST CF-E316N v2 board	2015-09-11 16:31:35 +00:00
mikrotik	ar71xx: Add support for AP147-010 reference board	2015-07-24 09:09:42 +00:00
nand	ar71xx: Add support for AP147-010 reference board	2015-07-24 09:09:42 +00:00
patches-4.1	ar71xx: fix ar724x clock calculation	2015-09-11 16:32:45 +00:00
base-files.mk
config-4.1	target: ar71xx: add support for COMFAST CF-E316N v2 board	2015-09-11 16:31:35 +00:00
Makefile
modules.mk