137 lines
3.6 KiB
Diff
137 lines
3.6 KiB
Diff
--- /dev/null
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+++ b/arch/mips/include/asm/mach-lantiq/war.h
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@@ -0,0 +1,24 @@
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+/*
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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+ * for more details.
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+ *
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+ */
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+#ifndef __ASM_MIPS_MACH_LANTIQ_WAR_H
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+#define __ASM_MIPS_MACH_LANTIQ_WAR_H
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+
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+#define R4600_V1_INDEX_ICACHEOP_WAR 0
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+#define R4600_V1_HIT_CACHEOP_WAR 0
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+#define R4600_V2_HIT_CACHEOP_WAR 0
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+#define R5432_CP0_INTERRUPT_WAR 0
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+#define BCM1250_M3_WAR 0
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+#define SIBYTE_1956_WAR 0
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+#define MIPS4K_ICACHE_REFILL_WAR 0
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+#define MIPS_CACHE_SYNC_WAR 0
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+#define TX49XX_ICACHE_INDEX_INV_WAR 0
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+#define RM9000_CDEX_SMP_WAR 0
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+#define ICACHE_REFILLS_WORKAROUND_WAR 0
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+#define R10000_LLSC_WAR 0
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+#define MIPS34K_MISSED_ITLB_WAR 0
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+
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+#endif
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--- /dev/null
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+++ b/arch/mips/include/asm/mach-lantiq/lantiq.h
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@@ -0,0 +1,47 @@
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+/*
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ *
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+ * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
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+ */
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+
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+#ifndef _LANTIQ_H__
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+#define _LANTIQ_H__
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+
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+/* generic reg access functions */
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+#define lq_r32(reg) __raw_readl(reg)
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+#define lq_w32(val, reg) __raw_writel(val, reg)
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+#define lq_w32_mask(clear, set, reg) lq_w32((lq_r32(reg) & ~clear) | set, reg)
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+
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+extern unsigned int lq_get_cpu_ver(void);
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+extern unsigned int lq_get_soc_type(void);
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+
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+/* clock speeds */
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+#define CLOCK_60M 60000000
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+#define CLOCK_83M 83333333
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+#define CLOCK_111M 111111111
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+#define CLOCK_111M 111111111
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+#define CLOCK_133M 133333333
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+#define CLOCK_167M 166666667
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+#define CLOCK_200M 200000000
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+#define CLOCK_333M 333333333
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+#define CLOCK_400M 400000000
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+
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+/* spinlock all ebu i/o */
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+extern spinlock_t ebu_lock;
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+
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+/* some irq helpers */
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+extern void lq_disable_irq(unsigned int irq_nr);
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+extern void lq_mask_and_ack_irq(unsigned int irq_nr);
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+extern void lq_enable_irq(unsigned int irq_nr);
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+
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+#define IOPORT_RESOURCE_START 0x10000000
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+#define IOPORT_RESOURCE_END 0xffffffff
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+#define IOMEM_RESOURCE_START 0x10000000
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+#define IOMEM_RESOURCE_END 0xffffffff
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+
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+#define LQ_FLASH_START 0x10000000
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+#define LQ_FLASH_MAX 0x04000000
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+
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+#endif
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--- /dev/null
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+++ b/arch/mips/include/asm/mach-lantiq/lantiq_regs.h
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@@ -0,0 +1,17 @@
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+/*
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ *
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+ * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
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+ */
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+
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+#ifndef _LANTIQ_REGS_H__
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+#define _LANTIQ_REGS_H__
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+
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+#ifdef CONFIG_SOC_LANTIQ_XWAY
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+#include <xway.h>
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+#include <xway_irq.h>
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+#endif
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+
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+#endif
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--- /dev/null
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+++ b/arch/mips/include/asm/mach-lantiq/lantiq_platform.h
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@@ -0,0 +1,36 @@
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+/*
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ *
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+ * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
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+ */
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+
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+#ifndef _LANTIQ_PLATFORM_H__
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+#define _LANTIQ_PLATFORM_H__
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+
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+#include <linux/mtd/partitions.h>
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+
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+/* struct used to pass info to network drivers */
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+enum {
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+ MII_MODE,
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+ REV_MII_MODE,
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+};
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+
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+struct lq_eth_data {
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+ unsigned char *mac;
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+ int mii_mode;
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+};
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+
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+/* struct used to pass info to the pci core */
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+enum {
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+ PCI_CLOCK_INT = 0,
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+ PCI_CLOCK_EXT
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+};
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+
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+struct lq_pci_data {
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+ int clock;
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+ int req_mask;
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+};
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+
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+#endif
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