07532dca7f
Also refresh the related generic/platform patches. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 36039
20 lines
743 B
Diff
20 lines
743 B
Diff
From 9dee771f3a7e51411a408cbb1070e73a50cbd285 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Wed, 13 Mar 2013 09:47:44 +0100
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Subject: [PATCH 29/40] NET: lantiq: adds gphy clock
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---
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arch/mips/lantiq/xway/sysctrl.c | 1 +
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1 file changed, 1 insertion(+)
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--- a/arch/mips/lantiq/xway/sysctrl.c
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+++ b/arch/mips/lantiq/xway/sysctrl.c
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@@ -376,6 +376,7 @@ void __init ltq_soc_init(void)
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PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM |
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PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 |
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PMU_PPE_QSB | PMU_PPE_TOP);
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+ clkdev_add_pmu("1f203000.rcu", "gphy", 0, PMU_GPHY);
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} else if (of_machine_is_compatible("lantiq,ar9")) {
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clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(),
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ltq_ar9_fpi_hz(), CLOCK_250M);
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