Tomasz Maciej Nowak cbdd2b62e4 mvebu: limit mvneta tx queue workaround to 32 bit SoC ... This patch has been carried since introduction throughout every kernel major bump and no one has tested if the later kernels improved the situation. The Armada 3720 SoC can only process GbE interrupts on Core 0 and this is already limited in all stable kernels, so ditch this workaround for 64 bit SoCs. Ref: https://git.kernel.org/torvalds/c/cf9bf871280d Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>		2021-07-25 13:52:38 +02:00
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base-files/lib
cortexa9
cortexa53
cortexa72
files/arch	mvebu: convert mtd-mac-address to nvmem implementation	2021-07-19 14:51:22 +02:00
files-5.4/arch/arm64/boot/dts/marvell
image
patches-5.4	mvebu: limit mvneta tx queue workaround to 32 bit SoC	2021-07-25 13:52:38 +02:00
patches-5.10	mvebu: limit mvneta tx queue workaround to 32 bit SoC	2021-07-25 13:52:38 +02:00
config-5.4
config-5.10
Makefile
modules.mk