54 lines
1.7 KiB
Diff
54 lines
1.7 KiB
Diff
From a9168d99658bd050e49afc06880d140e2fc2c231 Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jonas.gorski@gmail.com>
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Date: Tue, 12 Jun 2012 10:23:40 +0200
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Subject: [PATCH 3/8] MIPS: BCM63XX: Use the Chip ID register for identifying the SoC
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Newer BCM63XX SoCs use virtually the same CPU ID, differing only in the
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revision bits. But since they all have the Chip ID register at the same
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location, we can use that to identify the SoC we are running on.
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Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
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Cc: linux-mips@linux-mips.org
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Cc: Maxime Bizon <mbizon@freebox.fr>
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Cc: Florian Fainelli <florian@openwrt.org>
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Cc: Kevin Cernekee <cernekee@gmail.com>
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Patchwork: https://patchwork.linux-mips.org/patch/3955/
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Reviewed-by: Florian Fainelli <florian@openwrt.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/bcm63xx/cpu.c | 20 ++++++++++++--------
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1 files changed, 12 insertions(+), 8 deletions(-)
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--- a/arch/mips/bcm63xx/cpu.c
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+++ b/arch/mips/bcm63xx/cpu.c
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@@ -228,17 +228,21 @@ void __init bcm63xx_cpu_init(void)
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bcm63xx_irqs = bcm6345_irqs;
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break;
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case CPU_BMIPS4350:
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- switch (read_c0_prid() & 0xf0) {
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- case 0x10:
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+ if ((read_c0_prid() & 0xf0) == 0x10) {
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expected_cpu_id = BCM6358_CPU_ID;
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bcm63xx_regs_base = bcm6358_regs_base;
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bcm63xx_irqs = bcm6358_irqs;
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- break;
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- case 0x30:
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- expected_cpu_id = BCM6368_CPU_ID;
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- bcm63xx_regs_base = bcm6368_regs_base;
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- bcm63xx_irqs = bcm6368_irqs;
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- break;
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+ } else {
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+ /* all newer chips have the same chip id location */
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+ u16 chip_id = bcm_readw(BCM_6368_PERF_BASE);
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+
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+ switch (chip_id) {
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+ case BCM6368_CPU_ID:
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+ expected_cpu_id = BCM6368_CPU_ID;
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+ bcm63xx_regs_base = bcm6368_regs_base;
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+ bcm63xx_irqs = bcm6368_irqs;
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+ break;
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+ }
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}
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break;
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}
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