68d9cb8214
Run tested: ath79, ipq40xx Build tested: ath79, ipq40xx Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
33 lines
1.2 KiB
Diff
33 lines
1.2 KiB
Diff
From f5db8274c8d6c86812fd2036ae49153d3ade3eaa Mon Sep 17 00:00:00 2001
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From: richard zhu <hongxing.zhu@nxp.com>
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Date: Wed, 6 Nov 2019 15:11:36 +0800
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Subject: [PATCH] PCI: dwc: fix the msi failure after pm operations
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The controller may be powered off (Link is in L3) during the suspend
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mode. The MSI_ADDR would be missed after resume and MSI function
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would be failed.
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Re-store MSI_ADDR to fix the MSI failure after PM operations.
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Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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Acked-by: Fugang Duan <fugang.duan@nxp.com>
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Acked-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
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---
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drivers/pci/controller/dwc/pcie-designware-host.c | 6 ++++++
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1 file changed, 6 insertions(+)
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--- a/drivers/pci/controller/dwc/pcie-designware-host.c
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+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
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@@ -656,6 +656,12 @@ void dw_pcie_setup_rc(struct pcie_port *
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dw_pcie_setup(pci);
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if (!pp->ops->msi_host_init) {
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+ /* Program the msi_data */
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+ dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4,
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+ lower_32_bits((u64)pp->msi_data));
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+ dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4,
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+ upper_32_bits((u64)pp->msi_data));
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+
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num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL;
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/* Initialize IRQ Status array */
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