a0bb356612
Specifications: SoC: AR9344 DRAM: 128MB DDR2 Flash: 16MB SPI-NOR 2 Gigabit ethernet ports 2×2 2.4GHz on-board radio miniPCIe slot that supports 5GHz radio PoE 48V IEEE 802.3af/at - 24V passive optional USB 2.0 header Installation: To install, either start tftp in bin/targets/ath79/generic/ and use the u-boot prompt over UART: tftpboot 0x80500000 openwrt-ath79-generic-compex_wpj344-16m-squashfs-sysupgrade.bin erase 0x9f030000 +$filesize erase 0x9f680000 +1 cp.b $fileaddr 0x9f030000 $filesize boot The cpximg file can be used with sysupgrade in the stock firmware (add SSH key in luci for root access) or with the built-in cpximg loader. The cpximg loader can be started either by holding the reset button during power up or by entering the u-boot prompt and entering 'cpximg'. Once it's running, a TFTP-server under 192.168.1.1 will accept the image appropriate for the board revision that is etched on the board. For example, if the board is labelled '6A08': tftp -v -m binary 192.168.1.1 -c put openwrt-ath79-generic-compex_wpj344-16m-squashfs-cpximg-6a08.bin MAC addresses: <&uboot 0x2e010> *:99 (label) <&uboot 0x2e018> *:9a <&uboot 0x2e020> *:9b <&uboot 0x2e028> *:9c Only the first two are used (for ethernet), the WiFi modules have separate (valid) addresses. The latter two addresses are not used. Signed-off-by: Leon M. George <leon@georgemail.eu> [minor commit message adjustments, drop gpio in DTS, DTS style fixes, sorting, drop unused cpximg recipe] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
154 lines
2.4 KiB
Plaintext
154 lines
2.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
/dts-v1/;
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
#include "ar9344.dtsi"
|
|
|
|
/ {
|
|
compatible = "compex,wpj344-16m", "qca,ar9344";
|
|
model = "Compex WPJ344 (16MB flash)";
|
|
|
|
aliases {
|
|
label-mac-device = ð0;
|
|
led-boot = &led_status;
|
|
led-failsafe = &led_status;
|
|
led-running = &led_status;
|
|
led-upgrade = &led_status;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
led_status: status {
|
|
label = "wpj344:green:status";
|
|
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
sig1 {
|
|
label = "wpj344:red:sig1";
|
|
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
sig2 {
|
|
label = "wpj344:yellow:sig2";
|
|
gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
sig3 {
|
|
label = "wpj344:green:sig3";
|
|
gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
sig4 {
|
|
label = "wpj344:green:sig4";
|
|
gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
reset {
|
|
linux,code = <KEY_RESTART>;
|
|
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
|
|
debounce-interval = <60>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&ref {
|
|
clock-frequency = <40000000>;
|
|
};
|
|
|
|
&uart {
|
|
status = "okay";
|
|
};
|
|
|
|
&spi {
|
|
status = "okay";
|
|
|
|
num-cs = <1>;
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <25000000>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
uboot: partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x000000 0x030000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@30000 {
|
|
label = "firmware";
|
|
reg = <0x030000 0xfc0000>;
|
|
compatible = "denx,uimage";
|
|
};
|
|
|
|
art: partition@ff0000 {
|
|
label = "art";
|
|
reg = <0xff0000 0x010000>;
|
|
read-only;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&usb {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_phy {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
};
|
|
|
|
&wmac {
|
|
status = "okay";
|
|
|
|
mtd-cal-data = <&art 0x1000>;
|
|
};
|
|
|
|
&mdio0 {
|
|
status = "okay";
|
|
|
|
phy-mask = <0>;
|
|
|
|
phy0: ethernet-phy@0 {
|
|
reg = <0>;
|
|
phy-mode = "rgmii";
|
|
|
|
qca,ar8327-initvals = <
|
|
0x04 0x07600000 /* PORT0 PAD MODE CTRL */
|
|
0x10 0x80000080 /* POWER_ON_STRIP */
|
|
0x50 0x00000000 /* LED_CTRL0 */
|
|
0x54 0xc737c737 /* LED_CTRL1 */
|
|
0x58 0x00000000 /* LED_CTRL2 */
|
|
0x5c 0x00c30c00 /* LED_CTRL3 */
|
|
0x7c 0x0000007e /* PORT0_STATUS */
|
|
>;
|
|
};
|
|
};
|
|
|
|
ð0 {
|
|
status = "okay";
|
|
|
|
pll-data = <0x06000000 0x00000101 0x00001616>;
|
|
|
|
mtd-mac-address = <&uboot 0x2e010>;
|
|
|
|
phy-mode = "rgmii";
|
|
phy-handle = <&phy0>;
|
|
};
|