Openwrt/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
Adrian Schmutzler 883250014d ipq806x: move serial0 to DTSI files
All device DTS files in the target set the serial0 property to the
same value (*). So, let's move the definitions to the DTSI files.

That's also where the kernel defines it (qcom-ipq8064-v1.0.dtsi).

* The only exception is ipq8064-db149, which defines
  "serial0 = &uart2;", but inside a block called "alias" instead of
  "aliases". It must be assumed that this is broken anyway, so we
  don't touch it here.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-07-06 16:24:30 +02:00

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#include "qcom-ipq8064-v2.0.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "Netgear Nighthawk X4 D7800";
compatible = "netgear,d7800", "qcom,ipq8064";
memory@0 {
reg = <0x42000000 0xe000000>;
device_type = "memory";
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
rsvd@41200000 {
reg = <0x41200000 0x300000>;
no-map;
};
};
aliases {
mdio-gpio0 = &mdio0;
led-boot = &power_white;
led-failsafe = &power_amber;
led-running = &power_white;
led-upgrade = &power_amber;
};
chosen {
bootargs = "rootfstype=squashfs noinitrd";
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
wifi {
label = "wifi";
gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RFKILL>;
};
reset {
label = "reset";
gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&led_pins>;
pinctrl-names = "default";
usb1 {
label = "d7800:white:usb1";
gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
};
usb2 {
label = "d7800:white:usb2";
gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
};
power_amber: power_amber {
label = "d7800:amber:power";
gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
};
wan_white {
label = "d7800:white:wan";
gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
};
wan_amber {
label = "d7800:amber:wan";
gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
};
wps {
label = "d7800:white:wps";
gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
};
esata {
label = "d7800:white:esata";
gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
};
power_white: power_white {
label = "d7800:white:power";
gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
default-state = "keep";
};
wifi {
label = "d7800:white:wifi";
gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
};
};
};
&qcom_pinmux {
button_pins: button_pins {
mux {
pins = "gpio6", "gpio54", "gpio65";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
led_pins: led_pins {
mux {
pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
"gpio24","gpio26", "gpio53", "gpio64";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
usb0_pwr_en_pins: usb0_pwr_en_pins {
mux {
pins = "gpio15";
function = "gpio";
drive-strength = <12>;
bias-pull-down;
output-high;
};
};
usb1_pwr_en_pins: usb1_pwr_en_pins {
mux {
pins = "gpio16", "gpio68";
function = "gpio";
drive-strength = <12>;
bias-pull-down;
output-high;
};
};
};
&gsbi4 {
qcom,mode = <GSBI_PROT_I2C_UART>;
status = "okay";
serial@16340000 {
status = "okay";
};
/*
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
};
&sata_phy {
status = "okay";
};
&sata {
ports-implemented = <0x1>;
status = "okay";
};
&usb3_0 {
status = "okay";
pinctrl-0 = <&usb0_pwr_en_pins>;
pinctrl-names = "default";
};
&usb3_1 {
status = "okay";
pinctrl-0 = <&usb1_pwr_en_pins>;
pinctrl-names = "default";
};
&pcie0 {
status = "okay";
reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&pcie0_pins>;
pinctrl-names = "default";
};
&pcie1 {
status = "okay";
reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&pcie1_pins>;
pinctrl-names = "default";
force_gen1 = <1>;
};
&nand_controller {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
nand@0 {
reg = <0>;
compatible = "qcom,nandcs";
nand-ecc-strength = <4>;
nand-bus-width = <8>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
qcadata@0 {
label = "qcadata";
reg = <0x0000000 0x0c80000>;
read-only;
};
APPSBL@c80000 {
label = "APPSBL";
reg = <0x0c80000 0x0500000>;
read-only;
};
APPSBLENV@1180000 {
label = "APPSBLENV";
reg = <0x1180000 0x0080000>;
read-only;
};
art: art@1200000 {
label = "art";
reg = <0x1200000 0x0140000>;
read-only;
};
artbak: art@1340000 {
label = "artbak";
reg = <0x1340000 0x0140000>;
read-only;
};
kernel@1480000 {
label = "kernel";
reg = <0x1480000 0x0400000>;
};
ubi@1880000 {
label = "ubi";
reg = <0x1880000 0x1C00000>;
};
netgear@3480000 {
label = "netgear";
reg = <0x3480000 0x4480000>;
read-only;
};
reserve@7900000 {
label = "reserve";
reg = <0x7900000 0x0700000>;
read-only;
};
};
};
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&phy4>;
qcom,id = <1>;
pinctrl-0 = <&rgmii2_pins>;
pinctrl-names = "default";
mtd-mac-address = <&art 6>;
};
&gmac2 {
status = "okay";
phy-mode = "sgmii";
qcom,id = <2>;
mtd-mac-address = <&art 0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&adm_dma {
status = "okay";
};