Openwrt/target/linux/ath79/dts/ar7241_ubnt-unifi.dts
Rafał Miłecki 66c8afd115 ath79: relicense DTS files to the GPL 2.0+ / MIT
Some maintainers prefer DTS files licensed under permissive license like
MIT / BSD. As all DT bindings should be OS independent and DTS files are
pretty separated from Linux code it probably makes sense to share them
across projects.

The safest solution is to use dual licensing: that way it stays clear
these files can be used in GPL projects without depending on current
belief of licenses compatibility.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: John Crispin <john@phrozen.org>
2018-05-07 10:31:35 +02:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar7241.dtsi"
/ {
compatible = "ubnt,unifi", "qca,ar7241";
model = "Ubiquiti UniFi AP";
memory@0 {
device_type = "memory";
reg = <0x0 0x4000000>;
};
extosc: ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <40000000>;
};
keys {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
button@0 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
led@0 {
label = "ubnt:green:dome";
gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
};
led@1 {
label = "ubnt:orange:dome";
gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
};
};
};
&uart {
status = "okay";
};
&pll {
clocks = <&extosc>;
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mx25l6405d";
reg = <0>;
spi-max-frequency = <25000000>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
};
partition@1 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
};
partition@2 {
label = "firmware";
reg = <0x050000 0x750000>;
};
partition@3 {
label = "board_config";
reg = <0x7a0000 0x010000>;
read-only;
};
partition@4 {
label = "cfg";
reg = <0x7b0000 0x040000>;
read-only;
};
art: partition@5 {
label = "art";
reg = <0x7f0000 0x010000>;
read-only;
};
};
};
&pcie {
status = "okay";
ath9k@0000 {
reg = <0x0000 0 0 0 0>;
qca,no-eeprom;
};
};
&mdio0 {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "mii";
};
};
&eth0 {
status = "okay";
mtd-mac-address = <&art 0x0>;
phy-handle = <&phy4>;
};
&eth1 {
status = "okay";
compatible = "syscon";
};