b0b59a8e75
*Enable SMEM MTD parser and its dependencies (SMEM & HW spinlocks) in the kernel config *Replaces the MTD layout in DT by the dynamic layout provided by the SMEM parser for AP148 Using the OF based parser is still possible on platforms which have a fixed MTD partition layout. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46658
77 lines
1.9 KiB
Diff
77 lines
1.9 KiB
Diff
Content-Type: text/plain; charset="utf-8"
|
|
MIME-Version: 1.0
|
|
Content-Transfer-Encoding: 7bit
|
|
Subject: [v3,5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148 platform
|
|
From: Archit Taneja <architt@codeaurora.org>
|
|
X-Patchwork-Id: 6927091
|
|
Message-Id: <1438578498-32254-6-git-send-email-architt@codeaurora.org>
|
|
To: linux-mtd@lists.infradead.org, dehrenberg@google.com,
|
|
cernekee@gmail.com, computersforpeace@gmail.com
|
|
Cc: linux-arm-msm@vger.kernel.org, agross@codeaurora.org,
|
|
sboyd@codeaurora.org, linux-kernel@vger.kernel.org,
|
|
Archit Taneja <architt@codeaurora.org>, devicetree@vger.kernel.org
|
|
Date: Mon, 3 Aug 2015 10:38:18 +0530
|
|
|
|
Enable the NAND controller node on the AP148 platform. Provide pinmux
|
|
information.
|
|
|
|
Cc: devicetree@vger.kernel.org
|
|
|
|
Signed-off-by: Archit Taneja <architt@codeaurora.org>
|
|
|
|
---
|
|
arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 36 ++++++++++++++++++++++++++++++++
|
|
1 file changed, 36 insertions(+)
|
|
|
|
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
|
|
+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
|
|
@@ -61,6 +61,28 @@
|
|
bias-none;
|
|
};
|
|
};
|
|
+ nand_pins: nand_pins {
|
|
+ mux {
|
|
+ pins = "gpio34", "gpio35", "gpio36",
|
|
+ "gpio37", "gpio38", "gpio39",
|
|
+ "gpio40", "gpio41", "gpio42",
|
|
+ "gpio43", "gpio44", "gpio45",
|
|
+ "gpio46", "gpio47";
|
|
+ function = "nand";
|
|
+ drive-strength = <10>;
|
|
+ bias-disable;
|
|
+ };
|
|
+ pullups {
|
|
+ pins = "gpio39";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ hold {
|
|
+ pins = "gpio40", "gpio41", "gpio42",
|
|
+ "gpio43", "gpio44", "gpio45",
|
|
+ "gpio46", "gpio47";
|
|
+ bias-bus-hold;
|
|
+ };
|
|
+ };
|
|
};
|
|
|
|
gsbi@16300000 {
|
|
@@ -123,5 +145,19 @@
|
|
pinctrl-0 = <&pcie1_pins>;
|
|
pinctrl-names = "default";
|
|
};
|
|
+
|
|
+ nand@1ac00000 {
|
|
+ status = "ok";
|
|
+
|
|
+ pinctrl-0 = <&nand_pins>;
|
|
+ pinctrl-names = "default";
|
|
+
|
|
+ nand-ecc-strength = <4>;
|
|
+ nand-bus-width = <8>;
|
|
+ };
|
|
};
|
|
};
|
|
+
|
|
+&adm_dma {
|
|
+ status = "ok";
|
|
+};
|