e4ce3109f2
The node pinctrl0 is already set up in the SOC DTSI files, but defined again as member of pinctrl in most of the device DTS(I) files. This patch removes this redundancy for the entire ramips target. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
81 lines
1.3 KiB
Plaintext
81 lines
1.3 KiB
Plaintext
#include "rt3050.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "unbranded,wr512-3gn", "ralink,rt3052-soc";
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aliases {
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led-boot = &led_wps;
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led-failsafe = &led_wps;
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led-running = &led_wps;
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led-upgrade = &led_wps;
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};
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leds {
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compatible = "gpio-leds";
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3g {
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label = "wr512-3gn:green:3g";
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gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
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};
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gateway {
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label = "wr512-3gn:green:gateway";
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gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
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};
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ap {
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label = "wr512-3gn:green:ap";
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gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
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};
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led_wps: wps {
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label = "wr512-3gn:green:wps";
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gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
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};
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station {
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label = "wr512-3gn:green:station";
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gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys-polled";
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poll-interval = <20>;
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reset_wps {
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label = "reset_wps";
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gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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mode {
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label = "mode";
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gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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};
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};
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};
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&state_default {
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gpio {
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ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
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ralink,function = "gpio";
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};
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};
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&esw {
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mediatek,portmap = <0x2f>;
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};
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&wmac {
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ralink,mtd-eeprom = <&factory 0>;
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};
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&otg {
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status = "okay";
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};
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