73015c4cb3
This patch introduces support of new boards with ARC HS38 cores.
ARC HS38 is a new generation of ARC cores which utilize ARCv2 ISA.
As with ARC770 we're addind support for 2 boards for now:
[1] Synopsys SDP board (AXS103)
This is the same base-board as in AXS101 but with
FPGA-based CPU-tile where ARCHs38 core is implemented.
[2] nSIM
Again this is the same simulation engine but configured for
new instruction set and features of new CPU.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Jo-Philipp Wich <jow@openwrt.org>
Cc: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 48740
38 lines
740 B
Plaintext
38 lines
740 B
Plaintext
/*
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* Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* Skeleton device tree; the bare minimum needed to boot; just include and
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* add a compatible value.
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*/
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/ {
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compatible = "snps,arc";
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clock-frequency = <80000000>; /* 80 MHZ */
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#address-cells = <1>;
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#size-cells = <1>;
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chosen { };
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aliases { };
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "snps,arc770d";
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reg = <0>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256M */
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};
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};
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