Openwrt/target/linux/ath79/dts/qca9558_tplink_tl-wr1043nd.dtsi
Adrian Schmutzler 3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca955x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
led-boot = &led_system;
led-failsafe = &led_system;
led-running = &led_system;
led-upgrade = &led_system;
label-mac-device = &wmac;
};
leds {
compatible = "gpio-leds";
led_system: system {
label = "green:system";
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
usb {
label = "green:usb";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port0>;
linux,default-trigger = "usbport";
};
wifi_green {
label = "green:wlan";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wifi_wps {
label = "green:wps";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
wifi {
label = "RFKILL button";
linux,code = <KEY_RFKILL>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
gpio_usb_power {
gpio-export,name = "tp-link:power:usb";
gpio-export,output = <1>;
gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
};
};
};
&usb_phy0 {
status = "okay";
};
&usb0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
hub_port0: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <33400000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x020000>;
read-only;
};
partition@20000 {
compatible = "tplink,firmware";
label = "firmware";
reg = <0x020000 0x7d0000>;
};
art: partition@7f0000 {
label = "art";
reg = <0x7f0000 0x010000>;
read-only;
};
};
};
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x04 0x00080080 /* PORT0 PAD MODE CTRL */
0x0c 0x07600000 /* PORT6 PAD MODE CTRL */
0x10 0x81000080 /* POWER_ON_STRAP */
0x50 0xcc35cc35 /* LED_CTRL0 */
0x54 0xca35ca35 /* LED_CTRL1 */
0x58 0xc935c935 /* LED_CTRL2 */
0x5c 0x03ffff00 /* LED_CTRL3 */
0x7c 0x0000007e /* PORT0_STATUS */
0x94 0x0000007e /* PORT6 STATUS */
>;
};
};
&eth0 {
status = "okay";
pll-data = <0x56000000 0x00000101 0x00001616>;
mtd-mac-address = <&uboot 0x1fc00>;
mtd-mac-address-increment = <1>;
phy-handle = <&phy0>;
};
&eth1 {
status = "okay";
pll-data = <0x03000101 0x00000101 0x00001616>;
mtd-mac-address = <&uboot 0x1fc00>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&uboot 0x1fc00>;
};