Openwrt/target/linux/ath79/dts/qca9558_dlink_dap-2680-a1.dts
Adrian Schmutzler acdf07cd3e ath79: keep DTSI files for D-Link SoC-specific
It is good practice to define device tree files based on specific
SoCs. Thus, let's not start to create files that are used across
different architectures.

Duplicate the DTSI file for D-Link DAP-2xxx in order to have one
for qca953x and one for qca955x, respectively.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-01-04 01:09:32 +01:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca955x_dlink_dap-2xxx.dtsi"
/ {
compatible = "dlink,dap-2680-a1", "qca,qca9558";
model = "D-Link DAP-2680 A1";
aliases {
led-boot = &led_power_green;
led-failsafe = &led_power_red;
led-running = &led_power_green;
led-upgrade = &led_power_red;
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_power_red: power_red {
label = "red:power";
gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
};
led_power_green: power_green {
label = "green:power";
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
default-state = "on";
};
};
};
&partitions {
partition@70000 {
label = "firmware";
reg = <0x70000 0xee0000>;
compatible = "wrg";
};
partition@f50000 {
label = "dlink";
reg = <0xf50000 0xa0000>;
read-only;
};
art: partition@ff0000 {
label = "art";
reg = <0xff0000 0x10000>;
read-only;
};
};
&mdio0 {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
};
};
&eth0 {
status = "okay";
pll-data = <0x82000000 0x80000101 0x80001313>;
phy-handle = <&phy4>;
phy-mode = "rgmii-id";
gmac-config {
device = <&gmac>;
rgmii-enabled = <1>;
rxd-delay = <3>;
rxdv-delay = <3>;
};
};
&pcie0 {
status = "okay";
};