41cc7edc15
The "/dts-v1/;" identifier is supposed to be present once at the top of a device tree file after the includes have been processed. In ath79, we therefore requested to have in the DTS files so far, and omit it in the DTSI files. However, essentially the syntax of the parent ath79.dtsi file already determines the DTS version, so putting it into the DTS files is just a useless repetition. Consequently, this patch puts the dts-v1 statement into the parent ath79.dtsi, which is (indirectly) included by all DTS files. All other occurences are removed. Since the dts-v1 statement needs to be before any other definitions, this also moves the includes to make sure the ath79.dtsi or its descendants are always included first. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
190 lines
3.4 KiB
Plaintext
190 lines
3.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "ar7242_ubnt_sw.dtsi"
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/ {
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compatible = "ubnt,edgeswitch-8xp", "qca,ar7242";
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model = "Ubiquiti EdgeSwitch 8XP";
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gpio-export {
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compatible = "gpio-export";
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poe_24v_port1 {
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gpio-export,name = "ubnt:24v-poe:port1";
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gpio-export,output = <0>;
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gpios = <&gpio_hc595 1 GPIO_ACTIVE_HIGH>;
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};
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poe_48v_port1 {
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gpio-export,name = "ubnt:48v-poe:port1";
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gpio-export,output = <0>;
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gpios = <&gpio_hc595 0 GPIO_ACTIVE_HIGH>;
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};
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poe_24v_port2 {
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gpio-export,name = "ubnt:24v-poe:port2";
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gpio-export,output = <0>;
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gpios = <&gpio_hc595 3 GPIO_ACTIVE_HIGH>;
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};
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poe_48v_port2 {
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gpio-export,name = "ubnt:48v-poe:port2";
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gpio-export,output = <0>;
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gpios = <&gpio_hc595 2 GPIO_ACTIVE_HIGH>;
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};
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poe_24v_port3 {
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gpio-export,name = "ubnt:24v-poe:port3";
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gpio-export,output = <0>;
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gpios = <&gpio_hc595 5 GPIO_ACTIVE_HIGH>;
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};
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poe_48v_port3 {
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gpio-export,name = "ubnt:48v-poe:port3";
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gpio-export,output = <0>;
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gpios = <&gpio_hc595 4 GPIO_ACTIVE_HIGH>;
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};
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poe_24v_port4 {
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gpio-export,name = "ubnt:24v-poe:port4";
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gpio-export,output = <0>;
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gpios = <&gpio_hc595 7 GPIO_ACTIVE_HIGH>;
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};
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poe_48v_port4 {
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gpio-export,name = "ubnt:48v-poe:port4";
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gpio-export,output = <0>;
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gpios = <&gpio_hc595 6 GPIO_ACTIVE_HIGH>;
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};
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poe_24v_port5 {
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gpio-export,name = "ubnt:24v-poe:port5";
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gpio-export,output = <0>;
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gpios = <&gpio_hc595 9 GPIO_ACTIVE_HIGH>;
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};
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poe_48v_port5 {
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gpio-export,name = "ubnt:48v-poe:port5";
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gpio-export,output = <0>;
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gpios = <&gpio_hc595 8 GPIO_ACTIVE_HIGH>;
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};
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poe_24v_port6 {
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gpio-export,name = "ubnt:24v-poe:port6";
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gpio-export,output = <0>;
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gpios = <&gpio_hc595 11 GPIO_ACTIVE_HIGH>;
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};
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poe_48v_port6 {
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gpio-export,name = "ubnt:48v-poe:port6";
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gpio-export,output = <0>;
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gpios = <&gpio_hc595 10 GPIO_ACTIVE_HIGH>;
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};
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poe_24v_port7 {
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gpio-export,name = "ubnt:24v-poe:port7";
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gpio-export,output = <0>;
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gpios = <&gpio_hc595 13 GPIO_ACTIVE_HIGH>;
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};
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poe_48v_port7 {
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gpio-export,name = "ubnt:48v-poe:port7";
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gpio-export,output = <0>;
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gpios = <&gpio_hc595 12 GPIO_ACTIVE_HIGH>;
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};
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poe_24v_port8 {
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gpio-export,name = "ubnt:24v-poe:port8";
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gpio-export,output = <0>;
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gpios = <&gpio_hc595 15 GPIO_ACTIVE_HIGH>;
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};
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poe_48v_port8 {
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gpio-export,name = "ubnt:48v-poe:port8";
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gpio-export,output = <0>;
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gpios = <&gpio_hc595 14 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&mdio0 {
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status = "okay";
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phy-mask = <0x10>;
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ethernet-switch@1e {
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compatible = "brcm,bcm53128";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x1e>;
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ports {
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port0@0 {
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reg = <0>;
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label = "lan1";
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};
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port1@1 {
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reg = <1>;
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label = "lan2";
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};
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port2@2 {
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reg = <2>;
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label = "lan3";
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};
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port3@3 {
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reg = <3>;
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label = "lan4";
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};
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port4@4 {
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reg = <4>;
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label = "lan5";
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};
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port5@5 {
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reg = <5>;
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label = "lan6";
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};
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port6@6 {
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reg = <6>;
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label = "lan7";
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};
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port7@7 {
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reg = <7>;
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label = "lan8";
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};
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phy0: port8@8 {
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reg = <8>;
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label = "cpu";
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ethernet = <ð0>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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};
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ð0 {
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status = "okay";
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phy-mode = "rgmii-rxid";
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pll-data = <0x16000000 0x00000101 0x00001313>;
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mtd-mac-address = <&art 0x0>;
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phy-handle = <&phy0>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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