3af779eb17
This is a backport of the patches accepted to the Linux mainline related to mvebu SoC (Armada XP and Armada 370) between Linux v3.11, and Linux v3.12. This work mainly covers: * Ground work for sharing the pxa nand driver(drivers/mtd/nand/pxa3xx_nand.c) between the PXA family,and the Armada family. * Further updates to the mvebu MBus. * Work and ground work for enabling MSI on the Armada family. * some phy / mdio bus initialization related work. * Device tree binding documentation update. Signed-off-by: Seif Mazareeb <seif.mazareeb@gmail.com> CC: Luka Perkov <luka@openwrt.org> SVN-Revision: 39565
68 lines
2.0 KiB
Diff
68 lines
2.0 KiB
Diff
From 23a9b291a7b9ba28b31da56e6ced7a8168baa3de Mon Sep 17 00:00:00 2001
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From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Date: Tue, 21 May 2013 11:01:33 -0300
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Subject: [PATCH 053/203] ARM: mvebu: Remove the harcoded BootROM window
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allocation
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The address decoding window to access the BootROM should not be
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allocated programatically, but instead declared in the device tree.
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Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Tested-by: Andrew Lunn <andrew@lunn.ch>
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Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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---
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arch/arm/mach-mvebu/platsmp.c | 25 ++++++++++++++++++++++++-
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1 file changed, 24 insertions(+), 1 deletion(-)
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--- a/arch/arm/mach-mvebu/platsmp.c
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+++ b/arch/arm/mach-mvebu/platsmp.c
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@@ -21,6 +21,7 @@
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#include <linux/smp.h>
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#include <linux/clk.h>
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#include <linux/of.h>
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+#include <linux/of_address.h>
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#include <linux/mbus.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_plat.h>
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@@ -29,6 +30,9 @@
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#include "pmsu.h"
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#include "coherency.h"
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+#define AXP_BOOTROM_BASE 0xfff00000
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+#define AXP_BOOTROM_SIZE 0x100000
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+
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void __init set_secondary_cpus_clock(void)
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{
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int thiscpu;
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@@ -115,10 +119,29 @@ static void __init armada_xp_smp_init_cp
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void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
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{
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+ struct device_node *node;
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+ struct resource res;
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+ int err;
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+
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set_secondary_cpus_clock();
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flush_cache_all();
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set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0);
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- mvebu_mbus_add_window("bootrom", 0xfff00000, SZ_1M);
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+
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+ /*
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+ * In order to boot the secondary CPUs we need to ensure
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+ * the bootROM is mapped at the correct address.
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+ */
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+ node = of_find_compatible_node(NULL, NULL, "marvell,bootrom");
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+ if (!node)
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+ panic("Cannot find 'marvell,bootrom' compatible node");
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+
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+ err = of_address_to_resource(node, 0, &res);
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+ if (err < 0)
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+ panic("Cannot get 'bootrom' node address");
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+
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+ if (res.start != AXP_BOOTROM_BASE ||
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+ resource_size(&res) != AXP_BOOTROM_SIZE)
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+ panic("The address for the BootROM is incorrect");
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}
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struct smp_operations armada_xp_smp_ops __initdata = {
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