0c109df7f0
The only difference between both boards is the DSL annex. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
72 lines
1.7 KiB
Diff
72 lines
1.7 KiB
Diff
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
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+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
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@@ -1828,6 +1828,52 @@ static struct board_info __initdata boar
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},
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};
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+static struct board_info __initdata board_HG622 = {
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+ .name = "96368MVWG_hg622",
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+ .expected_cpu_id = 0x6368,
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+
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+ .has_pci = 1,
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+ .has_ohci0 = 1,
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+ .has_ehci0 = 1,
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+ .num_usbh_ports = 2,
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+
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+ .has_caldata = 1,
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+ .caldata = {
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+ {
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+ .vendor = PCI_VENDOR_ID_RALINK,
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+ .caldata_offset = 0xfa0000,
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+ .slot = 1,
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+ .eeprom = "rt2x00.eeprom",
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+ },
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+ },
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+
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+ .has_enetsw = 1,
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+ .enetsw = {
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+ .used_ports = {
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+ [0] = {
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+ .used = 1,
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+ .phy_id = 1,
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+ .name = "port1",
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+ },
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+ [1] = {
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+ .used = 1,
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+ .phy_id = 2,
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+ .name = "port2",
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+ },
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+ [2] = {
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+ .used = 1,
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+ .phy_id = 3,
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+ .name = "port3",
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+ },
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+ [3] = {
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+ .used = 1,
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+ .phy_id = 4,
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+ .name = "port4",
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+ },
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+ },
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+ },
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+};
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+
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static struct sprom_fixup __initdata vr3025u_fixups[] = {
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{ .offset = 97, .value = 0xfeb3 },
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{ .offset = 98, .value = 0x1618 },
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@@ -2296,6 +2342,7 @@ static const struct board_info __initcon
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&board_96368mvwg,
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&board_96368mvngr,
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&board_DGND3700v1_3800B,
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+ &board_HG622,
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&board_HG655b,
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&board_P870HW51A_V2,
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&board_VR3025u,
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@@ -2404,6 +2451,7 @@ static struct of_device_id const bcm963x
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{ .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
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{ .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, },
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{ .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
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+ { .compatible = "huawei,echolife-hg622", .data = &board_HG622, },
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{ .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
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{ .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
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{ .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
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