b4c02c9998
Removed upstreamed patches:
generic/pending-5.4
445-mtd-spinand-gigadevice-Only-one-dummy-byte-in-QUA.patch
446-mtd-spinand-gigadevice-Add-QE-Bit.patch
pistachio/patches-5.4
150-pwm-img-Fix-null-pointer-access-in-probe.patch
Manually rebased:
layerscape/patches-5.4
801-audio-0011-Revert-ASoC-fsl_sai-add-of_match-data.patch
801-audio-0039-MLK-16224-6-ASoC-fsl_sai-fix-DSD-suspend-resume.patch
801-audio-0073-MLK-21957-3-ASoC-fsl_sai-add-bitcount-and-timestamp-.patch
820-usb-0009-usb-dwc3-Add-workaround-for-host-mode-VBUS-glitch-wh.patch
All modifications made by update_kernel.sh
Build system: x86_64
Build-tested: ipq806x/R7800, ath79/generic, bcm27xx/bcm2711,
mvebu (mamba, rango), x86_64, ramips/mt7621
Run-tested: ipq806x/R7800, mvebu (mamba, rango), x86_64, ramips (RT-AC57U)
No dmesg regressions, everything functional
Signed-off-by: John Audia <graysky@archlinux.us>
[alter 820-usb-0009-usb-dwc3-Add-workaround-for-host-mode-VBUS-glitch-wh]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
89 lines
3.4 KiB
Diff
89 lines
3.4 KiB
Diff
From c5324b25fe98c7a4784248b53a75720b226436c2 Mon Sep 17 00:00:00 2001
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From: Li Jun <jun.li@nxp.com>
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Date: Tue, 29 Oct 2019 17:40:25 +0800
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Subject: [PATCH] MLK-22675 usb: dwc3: host: disable park mode
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- Advantage of park mode
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When only a single Async endpoint is active.
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- Behavior of park mode
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1. The controller prefetches data/TRBs to do 3 * burst_size worth
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of packets.
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2. When park mode is disabled there will be some delay between
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bursts on the USB. This can be avoided if park mode is enabled
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in cases of only one endpoint is active.
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3. But this delay is significant only with systems of large
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latencies.
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4. We have noticed that in cases where a device NAKs often, it
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tends to bring down the performance for a single endpoint case.
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- Issue on "park mode"
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1. LSP (List Processor) goes in and out of park mode irrespective
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of the fact that there are more endpoints active. #LSP consider
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that there is only one endpoint active.
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2. This causes master scheduler and transaction handlers to think
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that they are in park mode even though they are not. This is
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because request to transaction handlers, generated by HSCH is
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in park mode when the request is made
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3. This causes a case where the master scheduler calculates wrongly
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the number of TRB cache space available.
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4. Because of the wrongly calculated number of TRB spaces, the core
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fetches more TRBS than there is space for.
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5. This causes overwriting the TRB cache area into the TRQ cache
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area which is next to the TRB cache area.
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6. This causes invalidating an entry in the TRQ
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7. This causes transaction handlers to ignore a request in the TRQ
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which it should have processed.
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8. This causes the main scheduler to hang because it is waiting for
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status from transaction handler.
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9. This causes host controller to hang.
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- Work Around
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Disabling park mode for super speed by setting GUCTL1[17] to be 1.
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The STAR number is 9001415732, which is target to be released around
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May,2020.
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Reviewed-by: Peter Chen <peter.chen@nxp.com>
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Reviewed-by: Ran Wang <ran.wang_1@nxp.com>
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Signed-off-by: Li Jun <jun.li@nxp.com>
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---
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drivers/usb/dwc3/core.c | 15 +++++++++++++++
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drivers/usb/dwc3/core.h | 1 +
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2 files changed, 16 insertions(+)
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--- a/drivers/usb/dwc3/core.c
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+++ b/drivers/usb/dwc3/core.c
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@@ -1039,6 +1039,21 @@ static int dwc3_core_init(struct dwc3 *d
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reg |= DWC3_GUCTL_HSTINAUTORETRY;
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dwc3_writel(dwc->regs, DWC3_GUCTL, reg);
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+
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+ /*
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+ * Disable Park Mode for super speed:
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+ * Park mode is used in host mode when only a single async
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+ * endpoint is active, but which has a known issue cause
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+ * USB3.0 HC may die when read and write at the same time,
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+ * considering the advantages of this mode are minimal,
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+ * this issue only impacts super speed and exist on all IP
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+ * versions, disable it for SS, Synopsys will release a formal
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+ * STAR 9001415732, and disable it by default in next IP
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+ * release.
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+ */
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+ reg = dwc3_readl(dwc->regs, DWC3_GUCTL1);
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+ reg |= DWC3_GUCTL1_PARKMODE_DISABLE_SS;
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+ dwc3_writel(dwc->regs, DWC3_GUCTL1, reg);
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}
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/*
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--- a/drivers/usb/dwc3/core.h
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+++ b/drivers/usb/dwc3/core.h
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@@ -255,6 +255,7 @@
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#define DWC3_GUCTL1_PARKMODE_DISABLE_SS BIT(17)
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#define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS BIT(28)
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#define DWC3_GUCTL1_DEV_L1_EXIT_BY_HW BIT(24)
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+#define DWC3_GUCTL1_PARKMODE_DISABLE_SS BIT(17)
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/* Global Status Register */
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#define DWC3_GSTS_OTG_IP BIT(10)
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