411ad3727a
It's wrong set the mux to bias-disable. The best way to do this is by creating a separate group and disable the specific pins. By documentation, any subgroup with no bias definition is ignored so the mux definition is useless. Rework the definition by sremoving the mux subgroup and set the remaining subgroup with the mux function and drive-strength Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
230 lines
3.6 KiB
Plaintext
230 lines
3.6 KiB
Plaintext
#include "qcom-ipq8064-v1.0.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. IPQ8064/AP-148";
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compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
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memory@0 {
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reg = <0x42000000 0x1e000000>;
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device_type = "memory";
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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rsvd@41200000 {
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reg = <0x41200000 0x300000>;
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no-map;
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};
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};
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aliases {
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serial0 = &gsbi4_serial;
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mdio-gpio0 = &mdio0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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soc {
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mdio0: mdio {
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compatible = "virtual,mdio-gpio";
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#address-cells = <1>;
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#size-cells = <0>;
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gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
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<&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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phy0: ethernet-phy@0 {
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reg = <0>;
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qca,ar8327-initvals = <
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0x00004 0x7600000 /* PAD0_MODE */
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0x00008 0x1000000 /* PAD5_MODE */
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0x0000c 0x80 /* PAD6_MODE */
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0x000e4 0x6a545 /* MAC_POWER_SEL */
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0x000e0 0xc74164de /* SGMII_CTRL */
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0x0007c 0x4e /* PORT0_STATUS */
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0x00094 0x4e /* PORT6_STATUS */
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>;
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};
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phy4: ethernet-phy@4 {
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reg = <4>;
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};
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};
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};
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};
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&qcom_pinmux {
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i2c4_pins: i2c4_pinmux {
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pins = "gpio12", "gpio13";
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function = "gsbi4";
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bias-disable;
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};
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nand_pins: nand_pins {
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disable {
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pins = "gpio34", "gpio35", "gpio36",
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"gpio37", "gpio38";
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function = "nand";
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drive-strength = <10>;
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bias-disable;
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};
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pullups {
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pins = "gpio39";
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function = "nand";
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drive-strength = <10>;
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bias-pull-up;
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};
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hold {
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pins = "gpio40", "gpio41", "gpio42",
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"gpio43", "gpio44", "gpio45",
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"gpio46", "gpio47";
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function = "nand";
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drive-strength = <10>;
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bias-bus-hold;
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};
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};
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mdio0_pins: mdio0_pins {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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drive-strength = <8>;
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bias-disable;
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};
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};
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rgmii2_pins: rgmii2_pins {
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mux {
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pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
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"gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
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function = "rgmii2";
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drive-strength = <8>;
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bias-disable;
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};
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};
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};
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&adm_dma {
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status = "okay";
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};
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&gsbi4 {
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qcom,mode = <GSBI_PROT_I2C_UART>;
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status = "okay";
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serial@16340000 {
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status = "okay";
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};
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/*
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* The i2c device on gsbi4 should not be enabled.
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* On ipq806x designs gsbi4 i2c is meant for exclusive
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* RPM usage. Turning this on in kernel manifests as
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* i2c failure for the RPM.
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*/
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};
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&gsbi5 {
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qcom,mode = <GSBI_PROT_SPI>;
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status = "okay";
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spi4: spi@1a280000 {
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status = "okay";
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spi-max-frequency = <50000000>;
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pinctrl-0 = <&spi_pins>;
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pinctrl-names = "default";
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cs-gpios = <&qcom_pinmux 20 0>;
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flash: m25p80@0 {
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compatible = "s25fl256s1";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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reg = <0>;
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partitions {
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compatible = "qcom,smem";
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};
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};
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};
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};
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&usb3_0 {
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status = "okay";
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};
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&usb3_1 {
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status = "okay";
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};
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&pcie0 {
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status = "okay";
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};
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&pcie1 {
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status = "okay";
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force_gen1 = <1>;
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};
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&nand {
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status = "okay";
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pinctrl-0 = <&nand_pins>;
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pinctrl-names = "default";
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cs0 {
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reg = <0>;
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compatible = "qcom,nandcs";
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nand-ecc-strength = <4>;
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nand-bus-width = <8>;
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nand-ecc-step-size = <512>;
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partitions {
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compatible = "qcom,smem";
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};
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};
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};
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&gmac1 {
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status = "okay";
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phy-mode = "rgmii";
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qcom,id = <1>;
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pinctrl-0 = <&rgmii2_pins>;
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pinctrl-names = "default";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&gmac2 {
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status = "okay";
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phy-mode = "sgmii";
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qcom,id = <2>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&sata_phy {
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status = "okay";
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};
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&sata {
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status = "okay";
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};
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