22caf30a65
FCC ID: U2M-ENH200 Engenius ENH202 is an outdoor wireless access point with 2 10/100 ports, built-in ethernet switch, internal antenna plates and proprietery PoE. Specification: - Qualcomm/Atheros AR7240 rev 2 - 40 MHz reference clock - 8 MB FLASH ST25P64V6P (aka ST M25P64) - 32 MB RAM - UART at J3 (populated) - 2x 10/100 Mbps Ethernet (built-in switch at gmac1) - 2.4 GHz, 2x2, 29dBm (Atheros AR9280 rev 2) - internal antenna plates (10 dbi, semi-directional) - 5 LEDs, 1 button (LAN, WAN, RSSI) (Reset) Known Issues: - Sysupgrade from ar71xx no longer possible - Power LED not controllable, or unknown gpio MAC addresses: eth0/eth1 *:11 art 0x0/0x6 wlan *:10 art 0x120c The device label lists both addresses, WLAN MAC and ETH MAC, in that order. Since 0x0 and 0x6 have the same content, it cannot be determined which is eth0 and eth1, so we chose 0x0 for both. Installation: 2 ways to flash factory.bin from OEM: - Connect ethernet directly to board (the non POE port) this is LAN for all images - if you get Failsafe Mode from failed flash: only use it to flash Original firmware from Engenius or risk kernel loop or halt which requires serial cable Method 1: Firmware upgrade page: OEM webpage at 192.168.1.1 username and password "admin" In upper right select Reset "Restore to factory default settings" Wait for reboot and login again Navigate to "Firmware Upgrade" page from left pane Click Browse and select the factory.bin image Upload and verify checksum Click Continue to confirm and wait 3 minutes Method 2: Serial to load Failsafe webpage: After connecting to serial console and rebooting... Interrupt boot with any key pressed rapidly execute `run failsafe_boot` OR `bootm 0x9f670000` wait a minute connect to ethernet and navigate to "192.168.1.1/index.htm" Select the factory.bin image and upload wait about 3 minutes Return to OEM: If you have a serial cable, see Serial Failsafe instructions *DISCLAIMER* The Failsafe image is unique to Engenius boards. If the failsafe image is missing or damaged this will not work DO NOT downgrade to ar71xx this way, can cause kernel loop or halt The easiest way to return to the OEM software is the Failsafe image If you dont have a serial cable, you can ssh into openwrt and run `mtd -r erase fakeroot` Wait 3 minutes connect to ethernet and navigate to 192.168.1.1/index.htm select OEM firmware image from Engenius and click upgrade Format of OEM firmware image: The OEM software of ENH202 is a heavily modified version of Openwrt Kamikaze bleeding-edge. One of the many modifications is to the sysupgrade program. Image verification is performed simply by the successful ungzip and untar of the supplied file and name check and header verification of the resulting contents. To form a factory.bin that is accepted by OEM Openwrt build, the kernel and rootfs must have specific names... openwrt-senao-enh202-uImage-lzma.bin openwrt-senao-enh202-root.squashfs and begin with the respective headers (uImage, squashfs). Then the files must be tarballed and gzipped. The resulting binary is actually a tar.gz file in disguise. This can be verified by using binwalk on the OEM firmware images, ungzipping then untaring, and by swapping headers to see what the OEM upgrade utility accepts and rejects. OKLI kernel loader is required because the OEM firmware expects the kernel to be no greater than 1024k and the factory.bin upgrade procedure would otherwise overwrite part of the kernel when writing rootfs. Note on built-in switch: ENH202 is originally configured to be an access point, but with two ethernet ports, both WAN and LAN is possible. the POE port is gmac0 which is preferred to be the port for WAN because it gives link status where swconfig does not. Signed-off-by: Michael Pratt <mpratt51@gmail.com> [assign label_mac in 02_network, use ucidef_set_interface_wan, use common device definition, some reordering] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
185 lines
3.0 KiB
Plaintext
185 lines
3.0 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "ar7240.dtsi"
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/ {
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compatible = "engenius,enh202-v1", "qca,ar7240";
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model = "EnGenius ENH202 v1";
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aliases {
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led-boot = &led_rssihigh;
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led-failsafe = &led_rssihigh;
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led-running = &led_rssihigh;
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led-upgrade = &led_rssihigh;
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&jtag_disable_pins &switch_led_disable_pins &clks_disable_pins>;
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rssilow {
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label = "enh202-v1:red:rssilow";
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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};
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rssimedium {
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label = "enh202-v1:amber:rssimedium";
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gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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};
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led_rssihigh: rssihigh {
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label = "enh202-v1:green:rssihigh";
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gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
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};
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lan {
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label = "enh202-v1:amber:lan";
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gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
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};
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wan {
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label = "enh202-v1:green:wan";
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gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
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};
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};
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ath9k-leds {
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compatible = "gpio-leds";
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wlan {
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label = "enh202-v1:green:wlan";
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gpios = <&ath9k 1 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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};
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virtual_flash {
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compatible = "mtd-concat";
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devices = <&firmware1 &firmware2>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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compatible = "openwrt,okli";
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label = "firmware";
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reg = <0x0 0x0>;
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};
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};
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};
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};
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&uart {
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status = "okay";
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};
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&spi {
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status = "okay";
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num-cs = <1>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <20000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "u-boot-env";
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reg = <0x40000 0x10000>;
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};
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partition@50000 {
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label = "custom";
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reg = <0x50000 0x50000>;
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read-only;
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};
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partition@a0000 {
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label = "loader";
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reg = <0xa0000 0x10000>;
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read-only;
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};
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firmware2: partition@b0000 {
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label = "firmware2";
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reg = <0xb0000 0xf0000>;
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};
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partition@1a0000 {
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label = "fakeroot";
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reg = <0x1a0000 0x10000>;
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};
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firmware1: partition@1b0000 {
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label = "firmware1";
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reg = <0x1b0000 0x4c0000>;
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};
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partition@670000 {
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label = "failsafe";
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reg = <0x670000 0x180000>;
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read-only;
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};
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art: partition@7f0000 {
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label = "art";
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reg = <0x7f0000 0x10000>;
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read-only;
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};
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};
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};
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};
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ð0 {
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mtd-mac-address = <&art 0x0>;
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};
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ð1 {
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status = "okay";
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mtd-mac-address = <&art 0x0>;
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};
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&pcie {
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status = "okay";
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ath9k: wifi@0,0 {
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compatible = "pci168c,002a";
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reg = <0x0000 0 0 0 0>;
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qca,no-eeprom;
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#gpio-cells = <2>;
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gpio-controller;
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};
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};
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