cddd459140
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
106 lines
4.1 KiB
Diff
106 lines
4.1 KiB
Diff
From 4f3ba90c37ec5aedd2227beb013bab59035fbb57 Mon Sep 17 00:00:00 2001
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From: Vladimir Oltean <vladimir.oltean@nxp.com>
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Date: Mon, 30 Sep 2019 19:20:26 +0300
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Subject: [PATCH] mii: Add helpers for parsing SGMII auto-negotiation
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Typically a MAC PCS auto-configures itself after it receives the
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negotiated copper-side link settings from the PHY, but some MAC devices
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are more special and need manual interpretation of the SGMII AN result.
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In other cases, the PCS exposes the entire tx_config_reg base page as it
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is transmitted on the wire during auto-negotiation, so it makes sense to
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be able to decode the equivalent lp_advertised bit mask from the raw u16
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(of course, "lp" considering the PCS to be the local PHY).
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Therefore, add the bit definitions for the SGMII registers 4 and 5
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(local device ability, link partner ability), as well as a link_mode
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conversion helper that can be used to feed the AN results into
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phy_resolve_aneg_linkmode.
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Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
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---
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include/linux/mii.h | 50 ++++++++++++++++++++++++++++++++++++++++++++++++
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include/uapi/linux/mii.h | 12 ++++++++++++
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2 files changed, 62 insertions(+)
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--- a/include/linux/mii.h
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+++ b/include/linux/mii.h
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@@ -373,6 +373,56 @@ static inline u32 mii_lpa_to_ethtool_lpa
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}
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/**
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+ * mii_lpa_mod_linkmode_adv_sgmii
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+ * @lp_advertising: pointer to destination link mode.
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+ * @lpa: value of the MII_LPA register
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+ *
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+ * A small helper function that translates MII_LPA bits to
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+ * linkmode advertisement settings for SGMII.
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+ * Leaves other bits unchanged.
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+ */
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+static inline void
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+mii_lpa_mod_linkmode_lpa_sgmii(unsigned long *lp_advertising, u32 lpa)
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+{
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+ u32 speed_duplex = lpa & LPA_SGMII_DPX_SPD_MASK;
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+
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+ linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, lp_advertising,
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+ speed_duplex == LPA_SGMII_1000HALF);
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+
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+ linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, lp_advertising,
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+ speed_duplex == LPA_SGMII_1000FULL);
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+
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+ linkmode_mod_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, lp_advertising,
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+ speed_duplex == LPA_SGMII_100HALF);
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+
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+ linkmode_mod_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, lp_advertising,
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+ speed_duplex == LPA_SGMII_100FULL);
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+
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+ linkmode_mod_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, lp_advertising,
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+ speed_duplex == LPA_SGMII_10HALF);
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+
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+ linkmode_mod_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, lp_advertising,
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+ speed_duplex == LPA_SGMII_10FULL);
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+}
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+
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+/**
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+ * mii_lpa_to_linkmode_adv_sgmii
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+ * @advertising: pointer to destination link mode.
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+ * @lpa: value of the MII_LPA register
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+ *
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+ * A small helper function that translates MII_ADVERTISE bits
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+ * to linkmode advertisement settings when in SGMII mode.
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+ * Clears the old value of advertising.
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+ */
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+static inline void mii_lpa_to_linkmode_lpa_sgmii(unsigned long *lp_advertising,
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+ u32 lpa)
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+{
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+ linkmode_zero(lp_advertising);
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+
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+ mii_lpa_mod_linkmode_lpa_sgmii(lp_advertising, lpa);
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+}
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+
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+/**
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* mii_adv_mod_linkmode_adv_t
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* @advertising:pointer to destination link mode.
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* @adv: value of the MII_ADVERTISE register
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--- a/include/uapi/linux/mii.h
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+++ b/include/uapi/linux/mii.h
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@@ -131,6 +131,18 @@
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#define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */
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#define NWAYTEST_RESV2 0xfe00 /* Unused... */
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+/* MAC and PHY tx_config_Reg[15:0] for SGMII in-band auto-negotiation.*/
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+#define ADVERTISE_SGMII 0x0001 /* MAC can do SGMII */
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+#define LPA_SGMII 0x0001 /* PHY can do SGMII */
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+#define LPA_SGMII_DPX_SPD_MASK 0x1C00 /* SGMII duplex and speed bits */
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+#define LPA_SGMII_10HALF 0x0000 /* Can do 10mbps half-duplex */
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+#define LPA_SGMII_10FULL 0x1000 /* Can do 10mbps full-duplex */
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+#define LPA_SGMII_100HALF 0x0400 /* Can do 100mbps half-duplex */
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+#define LPA_SGMII_100FULL 0x1400 /* Can do 100mbps full-duplex */
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+#define LPA_SGMII_1000HALF 0x0800 /* Can do 1000mbps half-duplex */
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+#define LPA_SGMII_1000FULL 0x1800 /* Can do 1000mbps full-duplex */
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+#define LPA_SGMII_LINK 0x8000 /* PHY link with copper-side partner */
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+
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/* 1000BASE-T Control register */
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#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */
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#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */
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